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About the Role
NVIDIA is seeking an innovative Senior STA Signoff Methodology Engineer to drive sign-off strategies for GPUs, CPUs, LPUs, and SoCs. This role offers a broad opportunity to optimize performance, yield, and reliability through modeling, analysis, and automation, influencing the next generation AI landscape. The position is ideal for those fascinated by the precision and craftsmanship required to make billions of transistors function on advanced technology nodes.
Responsibilities
- Run large-scale SPICE simulations and STA experiments to model the impact of advanced technologies on chip timing.
- Develop STA and PNR flows and recommendations addressing aging, self-heating, thermal effects, IR drop, electro migration, and other advanced-node physical effects.
- Collaborate with technology leads, physical-design engineers, and timing engineers to define and deploy sophisticated timing-signoff strategies for extraordinary silicon performance.
- Develop tools and methodologies that improve design performance, predictability, and silicon reliability beyond standard EDA tool capabilities.
- Work across STA, constraints, and timing and power optimization.
- Perform extensive data analysis using Python, JMP, or similar tools to improve STA-to-silicon correlation.
Requirements
- MS in Electrical or Computer Engineering, or equivalent experience, with 8 years of experience in ASIC design and timing.
- Solid understanding of RC extraction, device physics, STA methodologies, and EDA-tool limitations.
- Proven foundation in the mathematics and physics underlying electrical design.
- Experience with low-power techniques, including multi-Vt design, clock gating, power gating, activity-based power analysis, DVFS, and CDC.
- Understanding of signal and power integrity, crosstalk, electromigration, noise, OCV, timing margins, clock jitter, and IR drop.
- Understanding of standard-cell, memory, and I/O IP modeling and their use in ASIC flows.
- Hands-on experience with advanced FinFET and emerging CMOS technologies at 5 nm, 3 nm, 2 nm, and beyond.
- Familiarity with industry-standard ASIC tools such as PrimeTime, ICC2, RedHawk, and Tempus.
- Strong communication skills and a collaborative working style.
Skills
- Python
- JMP
- Tcl
- C++
Experience Level
- Senior
Education Level
- MS in Electrical or Computer Engineering
Salary/Compensations
- 168,000 USD – 264,500 USD for Level 4
- 196,000 USD – 310,500 USD for Level 5
Benefits
- Equity
- Comprehensive benefits package
About the Company
- NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years.
- Today, we’re tapping into the unlimited potential of AI to define the next era of computing.
- NVIDIA is widely considered one of the technology world's most desirable employers.
- We have some of the most forward-thinking and talented people in the world working for us.
Equal Opportunity
- NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer.
- We do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.