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About the Role

We are seeking a Principal AI & Secure Platform Architect to lead the development of next-generation software infrastructure and developer ecosystems for advanced semiconductor platforms. This role will help shape the software foundations for emerging intelligent edge computing solutions by architecting and building sophisticated development environments that bridge silicon architecture, compiler technology, AI-driven development tools, and secure cloud infrastructure.

Responsibilities

Architect a unified compilation and deployment framework spanning embedded firmware, DSP algorithms, ML models, and FPGA RTL configurations.
Develop and integrate compiler frontends, intermediate representations, optimization passes, backends, and runtime frameworks targeting heterogeneous compute resources.
Collaborate with silicon architects to optimize instruction sets, custom operators, accelerator interfaces, memory architecture, workload partitioning, and system-level power, performance, and area (PPA).
Establish common abstractions for execution, interoperability, and data movement across CPUs, DSP engines, ML accelerators, and configurable logic.
Build a headless, AI-agent-driven development platform that transforms natural-language application intent into compiled, validated, and deployable hardware/software pipelines.
Leverage LLMs and agentic workflows to automate code generation, workload partitioning, compiler optimization, build orchestration, simulation, testing, and debugging.
Integrate heterogeneous programming environments into a unified toolchain, from application and model development through executable binaries and programmable-logic configurations.
Establish reproducible, deterministic build and validation processes while using AI to accelerate development and optimization.
Integrate compilation, simulation, debugging, profiling, and validation into a unified, AI-orchestrated development workflow that accelerates development from concept to deployable artifacts.
Architect and own a secure, cloud-native, multi-tenant development environment supporting collaboration among Cirrus, third-party software IP providers, and customers.
Establish an end-to-end secure software development lifecycle (SSDLC) encompassing IP onboarding, development, compilation, integration, simulation, validation, artifact signing, secure distribution, deployment, and lifecycle updates.
Design strong tenant isolation, identity and access controls, encryption, secrets management, and protected build and execution environments to safeguard proprietary source code, ML models, and algorithms.
Establish software provenance, integrity verification, secure boot and provisioning interfaces, and chain-of-trust mechanisms extending from cloud development infrastructure to execution on silicon.
Enable controlled collaboration, debugging, profiling, and system-level simulation across vendor boundaries while maintaining confidentiality, access restrictions, and auditable software supply chains.
Partner closely with SoC architects, ML engineers, DSP specialists, embedded software teams, and security experts to shape the hardware/software platform architecture.
Evaluate and integrate open-source and commercial compiler frameworks, AI development technologies, simulation platforms, and secure cloud infrastructure.
Drive architectural decisions, develop working prototypes, and establish the technical foundation for a scalable third-party developer ecosystem.
Operate autonomously in an early-stage innovation environment, balancing long-term architectural vision with rapid experimentation and execution.

Requirements

Master's or Ph.D. in Computer Science, Electrical Engineering, Computer Engineering, or a related field, or equivalent technical expertise, with 10+ years of relevant experience in compiler development, embedded systems, heterogeneous computing, or developer platforms.
Deep knowledge of compiler design, code generation, optimization, runtime systems, and processor microarchitecture, with hands-on experience in LLVM, MLIR, GCC, or comparable compiler infrastructure.
Strong experience with ARM embedded development and exposure to DSP programming, ML inference deployment, accelerator mapping, and FPGA development flows.
Experience architecting cloud-native developer platforms, multi-tenant infrastructure, secure build environments, CI/CD pipelines, and software supply-chain security.
Understanding of secure software development practices, workload isolation, cryptographic signing, software provenance, trusted execution, secure deployment, and protection of third-party intellectual property.
Demonstrated experience applying LLMs, AI agents, and automated engineering workflows to software development, compilation, testing, or complex toolchain orchestration.
Strong proficiency in C/C++, Python, APIs, SDKs, build systems, and distributed development infrastructure.
Proven ability to architect and deliver complex, cross-disciplinary systems, operate independently, and influence decisions spanning silicon, software, security, and customer experience.
Candidates must be able to access technical data without a requirement for an export license.
Unable to sponsor or obtain export licenses for this role.

Skills

Compiler development
Embedded systems
Heterogeneous computing
Developer platforms
Compiler design
Code generation
Optimization
Runtime systems
Processor microarchitecture
LLVM
MLIR
GCC
ARM embedded development
DSP programming
ML inference deployment
Accelerator mapping
FPGA development
Cloud-native developer platforms
Multi-tenant infrastructure
Secure build environments
CI/CD pipelines
Software supply-chain security
Secure software development practices
Workload isolation
Cryptographic signing
Software provenance
Trusted execution
Secure deployment
Protection of third-party intellectual property
LLMs
AI agents
Automated engineering workflows
C/C++
Python
APIs
SDKs
Build systems
Distributed development infrastructure
Systems leadership
Compilers for NPUs, AI accelerators, DSPs, GPUs, or custom processor architectures
ML compilation and deployment frameworks (TVM, IREE, ONNX, TensorFlow Lite, PyTorch)
FPGA synthesis
Hardware/software co-simulation
Virtual platforms
Performance modeling
Secure multi-party development platforms
Confidential computing environments
Hardware roots of trust
Protected IP distribution ecosystems
Semiconductor startups
Emerging compute architectures
Developer ecosystems
Early-stage technology incubation

Experience Level

10+ years of relevant experience

Education Level

Master's or Ph.D. in Computer Science, Electrical Engineering, Computer Engineering, or a related field, or equivalent technical expertise

About the Company

For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal processing.
Our rockstar team thrives on solving complex challenges with innovative end-user solutions for the world's top consumer brands.
Cirrus Logic is also known for its award-winning culture, which was built on a foundation of inclusion and fairness, meaningful community engagement, and delivering enjoyable employee experiences at every turn.
We are seeking a Principal AI & Secure Platform Architect to lead the development of next-generation software infrastructure and developer ecosystems for advanced semiconductor platforms.
As part of Cirrus Logic Venture Labs (CVL), this role will help shape the software foundations for emerging intelligent edge computing solutions.

Equal Opportunity

Export control restrictions based upon applicable laws and regulations would prohibit candidates who are nationals of certain embargoed countries from working in this position without Cirrus Logic first obtaining an export license.
Cirrus Logic strives to select the best qualified applicant for any opening.
Different approaches, ideas and points of view are both valued and respected.
Employment decisions are made on the basis of job-related criteria without regard to race, color, religion, sex, national origin, age, protected veteran or disabled status, genetic information, or any other classification protected by applicable law.