Design Verification at Apple | Austin, TX, US | Rezi

Design Verification at Apple

Design Verification

Apple · Austin, TX, US

Yesterday

Design Verification

Apple · Austin, TX, US

2 days ago
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About the Role

Create software to verify the architecture and functionality of pre-silicon hardware designs. Ensure the quality of the SOC, IP, or subsystem by reviewing design and architecture specifications and collaborating closely with design and micro-architecture teams.

Responsibilities

  • Create software to verify architecture and functionality of pre-silicon hardware designs.
  • Program in object-oriented programming, C, C++, System Verilog, Python, and Perl.
  • Run regressions, performing bug tracking, and analyzing code and functional coverage.
  • Simulate and debug Register Transfer Level (RTL).
  • Collaborate with all fields (vertical product model).
  • Ensure the quality of the SOC or an IP or subsystem.
  • Review design and architecture specifications and working closely with design and micro-architecture teams.
  • Develop test plans, tests and coverage plans.
  • Define the next generation verification methodology & testbenches.
  • Collaborate with design, architecture and software to understand the use cases and corner conditions and drive test cases.
  • Work on one or several of the following types of IP: Neural Engine hardware, DRAM subsystem, memory controller logic, Encode and Decode systems for ProRes and other codec formats such as VP9, AV1, Hardware security, including cryptographic algorithm implementations, High-Speed 10 standards such as PCI Express, DisplayPort, MIPI, Power management and fabric infrastructure, Memory cache management, Display Subsystem, Debug Subsystem for variety of panels and products.

Requirements

  • Utilize Computer Architecture knowledge to understand micro-architecture of various design blocks.
  • Utilize System Verilog/UVM to develop test-bench code and test-sequences for verifying the design blocks.
  • Use Python or Perl for scripting to create design verification collaterals.
  • Use NCSIM and Xcelium for waveform debug to understand and triage regression failures.
  • Utilize assertions writing to verify RTL for corner-case scenarios.
  • Implement Digital Design knowledge to understand design architecture of subsystem.
  • Utilize functional coverage and code coverage understanding to test coverage holes in design verification of IP blocks.

Skills

  • Object-oriented programming
  • C
  • C++
  • System Verilog
  • Python
  • Perl
  • System Verilog/UVM
  • NCSIM
  • Xcelium

Location

  • Austin, Texas

Work Type

  • 40 hours/week

Experience Level

  • 5 years of experience

Education Level

  • Master's Degree or foreign equivalent in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering, or related field

About the Company

  • Apple is a place where extraordinary people gather to do their lives best work.
  • Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without.
  • It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.