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About the Role
Develop world class, highly integrated, low power, System on a Chip devices to serve the IoT wireless market.
Responsibilities
- Develop complex SoC/chip Architectures with multiple processors, digital and mixed signal subsystems, multiple power, and clock domains with a goal towards optimizing power for specific customer scenarios.
- RTL design of modules through System Verilog HDL coding, adhering to quality standards.
- Prepare and hold architecture, design, and verification reviews with technical staff throughout project lifecycle.
- SoC level configuration and integration of digital and mixed-signal IPs.
- Perform logic synthesis, full chip timing and power analysis to optimize designs for key customer scenarios.
- Experience in working with backend team to optimize design for power performance and area.
- Pre-silicon verification utilizing a combination of block/chip-level test benches.
- Validation/bring-up of designs on silicon, providing support to cross-functional teams.
Requirements
- Master’s degree in Electrical Engineering
- 3-5 years of professional experience in digital CMOS IC design
- Verilog RTL design with demonstrated experience of taking designs through the silicon development lifecycle to production
- Knowledge of embedded processor systems and C coding
- Experience with logic simulators for both RTL and gate-level simulation, design/waveform browsers, and power analysis tools
- Experience with logic synthesis and timing constraints
- Experience in working with analog and mixed signal designs, to support design integration and verification of these subsystems in SOC.
- Experience with scripting and automation.
- Experience with revision control and configuration management systems (such as Perforce, Git, Methodics)
- Excellent written and verbal communications skills
- Demonstrated ability to generate high output in a self-driven manner
- Experience with artificial intelligence (AI) powered tools and technologies used to enhance productivity, analysis, and decision-making
Skills
- System Verilog HDL
- Embedded processor systems
- C coding
- Logic simulators
- RTL simulation
- Gate-level simulation
- Design/waveform browsers
- Power analysis tools
- Logic synthesis
- Timing constraints
- Analog and mixed signal designs
- Scripting
- Automation
- Python
- Perl
- Tcl
- Revision control
- Configuration management
- Perforce
- Git
- Methodics
- Artificial intelligence (AI) powered tools and technologies
Location
- Austin, TX
Work Type
- Hybrid
Experience Level
- 3-5 years
Education Level
- Master’s degree in Electrical Engineering
Salary/Compensations
- $101,500 - $188,500 USD
Benefits
- Great medical (Choice of PPO or Consumer Driven Health Plan with HSA), dental and vision plans
- Highly competitive salary
- 401k plan with match and Roth plan option
- Equity rewards (RSUs)
- Life/AD&D and disability coverage
- Flexible spending accounts
- Adoption assistance
- Back-Up childcare
- Commuter benefits
- Legal benefits
- Pet insurance
- Flexible PTO schedule
- 3 paid volunteer days per year
- Charitable contribution match
- Tuition reimbursement
- Free downtown parking
- Onsite gym
- Monthly wellness offerings
- Free snacks
- Company updates with our CEO
About the Company
- Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives.
- Merging cutting-edge technology into the world’s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications.
- Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets.
- Learn more at www.silabs.com.
Equal Opportunity
- Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law.