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About the Role
Join a fast-growing and diverse team responsible for high-performance analog IPs and complex chip levels integral to Apple's world-class products. This role offers an environment that fosters engineering refinement, passion, creativity, and collaboration, valuing diverse perspectives for innovation.
Responsibilities
- Deliver PDV clean layout.
- Collaborate with circuit design teams to plan and schedule work.
- Negotiate layout trade-offs for complex analog layout in deep SubMicron CMOS technologies.
- Recognize failure-prone circuit and layout structures.
- Run complete sets of design verification tools at mega-cell and chip levels.
- Interpret LVS, DRC, and ERC reports to efficiently complete layout.
- Exceed engineering specifications and expectations by working closely with circuit design teams.
- Utilize advanced CAD tools and mask design knowledge to deliver correct and robust layout meeting stringent matching performance, area, and power requirements.
Requirements
- BS and a minimum of 3 years relevant industry experience.
Skills
- Analog/mixed-signal layout design of SubMicron CMOS circuits.
- Building tight matching, low capacitance, low power analog blocks, resistors, capacitors, high voltage devices, pad IOs, ESD structures.
- Custom and standard cell based floor planning and hierarchical layout assembly.
- Understanding of IR drop, RC delay, electro-migration, self-heating, and cross capacitance.
- Analog and DFM practices.
- PMU and chip level layout.
- PERL or SKILL CODE scripting.
- Excellent communication skills.
- Ability to work with multi-functional teams.
- Proficiency in interpretation of Calibre, DRC, ERC, LVS reports.
- Knowledge of MENTOR GRAPHICS or CADENCE layout tools.
Experience Level
- Minimum of 3 years relevant industry experience
- Relevant experience in analog/mixed-signal layout design of SubMicron CMOS circuits
- Experience building tight matching, low capacitance, low power analog blocks, resistors, capacitors, high voltage devices, pad IOs, ESD structures
- Experience with custom and standard cell based floor planning and hierarchical layout assembly
- Experience in PMU and chip level layout
Education Level
- BS
- Master's Degree preferred
About the Company
- The PMU team is a fast-growing and highly diverse group.
- We offer an employee-friendly schedule.
- We are in charge of all high-performance analog IPs and building complex chip levels integral to the function of Apple’s world-class products.
- We provide an environment optimal for the refinement of engineering abilities.
- We promote passion, creativity, and collaboration.
- We believe multiple perspectives and input sources are integral to innovation and invention.
- We highly value diversity and equal opportunities for all members.
- We work with stellar analog and digital design teams and with members of integration, CAD, and circuit- and technology- engineering.
- We are a highly dynamic work environment with endless learning opportunities.
Equal Opportunity
- We highly value diversity and equal opportunities for all members.