Silicon Architect, Subsystem Architecture at Meta | Austin, TX, US | Rezi

Silicon Architect, Subsystem Architecture at Meta

Silicon Architect, Subsystem Architecture

Meta · Austin, TX, US

3 days ago

Silicon Architect, Subsystem Architecture

Meta · Austin, TX, US

4 days ago
Resume preview

Impress employers and recruiters.
Choose from hundreds of resume examples.

Target Resume Now
Resume preview

Tailor your resume to this Silicon Architect, Subsystem Architecture role.

Rezi rewrites your resume against Meta's job description. Free.

Resume score gauge reading 58 out of 100

Don't guess if your resume is good enough.

See how it scores against the Silicon Architect, Subsystem Architecture posting at Meta — free, in seconds.

About the Role

Reality Labs is developing advanced AR/AI enabled wearables, requiring custom silicon for compute performance and power efficiency. As a Memory Architect, you will analyze and define on-chip memory for accelerator subsystems, balancing power, performance, and area (PPA) within tight wearable budgets.

Responsibilities

  • Analyze memory requirements per workload across accelerator subsystems, including caches, scratchpads and DSP local memories.
  • Evaluate SRAM options and recommend the best fit for each memory.
  • Build memory models and perform power, performance, and area comparisons to inform architecture decisions.
  • Support studies on memory hierarchy trade-offs, such as cache sizing and on-chip versus off-chip memory.
  • Track emerging memory technologies and assess their fit for wearable subsystems.
  • Correlate memory estimates with pre-silicon and silicon data, and inform improvements to modeling methodologies.
  • Work with senior memory architects, IP and DSP architects, memory and circuit design teams, and software and firmware teams across multiple programs.

Requirements

  • Currently have, or are in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta.
  • 2+ years of experience in silicon architecture, memory design, or related silicon engineering disciplines.
  • Experience, through industry, internships or graduate research, in at least one of: memory hierarchy and cache analysis, or SRAM circuit design.
  • Understanding of how memory technologies, architectures and microarchitectures affect the power, performance and area of memory-intensive systems.
  • Experience building analytical, functional and cycle-accurate models to evaluate memory trade-offs.

Skills

  • Memory hierarchy and cache analysis
  • SRAM circuit design
  • Memory modeling
  • Power, performance, and area (PPA) analysis
  • Emerging memory technologies
  • SPICE
  • Memory compilers
  • Low-voltage SRAM
  • DSP memories

Location

  • Remote

Work Type

  • Full-time

Experience Level

  • 2+ years

Education Level

  • Bachelor's degree
  • PhD

Salary/Compensations

  • $114,000/year to $172,000/year

Benefits

  • Bonus
  • Equity
  • Benefits

About the Company

  • Reality Labs focuses on delivering Meta's vision through creating advanced AR/AI enabled wearables.
  • The compute performance and power efficiency requirements of wearables require custom silicon.
  • Reality Labs Silicon team is driving the state-of-the-art forward with breakthrough work in AI, augmented reality, computer vision, machine learning, graphics, displays, and sensors.
  • Our chips will enable wearable devices where our real and virtual worlds will mix and match throughout the day.
  • We believe the only way to achieve our goals is to look at the entire stack, from transistors, through architecture, firmware, and algorithms.