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About the Role
Join Apple and contribute to the development of groundbreaking products and services. This role offers the opportunity to craft upcoming products that will delight millions of customers and transform hardware technology. You will be responsible for leading-edge IP development and coordinating with multiple SOC teams, executing design and integration tasks for high-quality IP deliverables.
Responsibilities
- Own full chip and block level timing closure/constraints throughout the entire project.
- Collaborate with SoC Design, SoC Design Verification, DFT, Architecture, and Physical Design teams.
- Work with CAD and Flow teams to define and improve front-end design methodologies.
- Develop and maintain methodologies and flows related to timing analysis.
Requirements
- Bachelors Degree.
- Strong fundamentals in Digital design.
- Familiarity with ASIC design timing concepts.
- Proficiency in scripting languages (TCL, Python, and Perl).
- Exposure to STA tools (Primetime).
- Experience writing timing constraints.
- Knowledge of timing corners/modes is a plus.
- Familiarity with front-end tools and methodologies such as Synthesis and Logic Equivalence Checks.
- Self-starter and highly motivated.
- Ability to communicate effectively across all internal groups.
Skills
- Digital design
- ASIC design timing
- TCL
- Python
- Perl
- STA tools
- Primetime
- Timing constraints
- Timing corners
- Timing modes
- Synthesis
- Logic equivalence checks
Location
- Apple
Work Type
- Full-time
Experience Level
- Entry Level
Education Level
- Bachelors Degree
About the Company
- At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences.
- We are driven by passion and dedication, aiming to accomplish great things.
- We foster a dynamic, people-inspiring environment with innovative technologies.
- Our team members have reinvented entire industries with Apple Hardware products.
- We are committed to leaving the world better than we found it.