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About the Role
The GPU top design team develops micro-architecture and RTL for critical top-level infrastructure IP and drives micro-architectural improvements across the entire GPU through our holistic system-level perspective. We own complete IP blocks including interconnects, control logic and clocking/reset distribution. Our unique position working across the full GPU scope enables us to identify optimization opportunities that span multiple units which means our micro-architecture work can influence outside of IP that we own when we identify better system-level solutions. We handle the complete design flow for our IP from concept through physical design handoff, while also contributing to GPU-level assembly and integration.
Responsibilities
- Develop micro-architecture and RTL for critical top-level infrastructure IP.
- Drive micro-architectural improvements across the entire GPU.
- Own complete IP blocks including interconnects, control logic and clocking/reset distribution.
- Identify optimization opportunities that span multiple units.
- Influence design outside of owned IP by identifying better system-level solutions.
- Handle the complete design flow for IP from concept through physical design handoff.
- Contribute to GPU-level assembly and integration.
Requirements
- Expertise in design including logic synthesis.
- Expertise in SystemVerilog/VHDL.
- Proficiency in revision control systems.
- Strong problem-solving skills.
- Ability to work across team boundaries.
- Productivity under aggressive schedules.
Skills
- Logic synthesis
- SystemVerilog
- VHDL
- Revision control systems
- Problem-solving
- Scripting languages (Python/Ruby/Tcl)
- Computer architecture
- Physical design
- Large-scale SoC or GPU design
Location
- UK
Work Type
- Full-time
Experience Level
- Expert
About the Company
- The Top Design team at the UK GPU Design Centre works on complex, large-scale GPU related projects.
- We partner with our graphics architecture, functional verification and physical design teams to deliver high quality graphics IP in order to meet performance, feature, timing, area, and power goals.