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About the Role
Qualcomm is seeking talented Physical Design Engineers to contribute to next-generation semiconductor technologies across high-performance computing, AI, mobile, automotive, and data center applications. Engineers will work on various aspects of Physical Design ASIC and SoC development, including floorplan, Clock Tree Synthesis, low power implementation, timing analysis, design methodology, automation, and enabling new technology nodes.
Responsibilities
- Execute and drive all stages of the physical design flow from synthesized netlist to tape-out.
- Develop and implement physical design solutions for complex, high-speed, and low-power ASICs and SoCs.
- Perform floorplanning, partitioning, power planning, and IR-drop analysis.
- Execute placement, clock tree synthesis (CTS), routing, timing optimization, and timing closure across Multi-Mode Multi-Corner (MMMC) scenarios.
- Analyze and resolve timing violations, signal integrity issues, crosstalk effects, and physical design rule violations.
- Perform RC extraction, physical verification, and formal verification activities.
- Implement engineering change orders (ECOs) and support design convergence through sign-off.
- Collaborate with architecture, RTL, DFT, verification, and methodology teams to ensure successful project execution.
- Contribute to the development of innovative low-power implementation methodologies and customized place-and-route solutions.
- Develop automation and productivity tools using scripting languages and software development techniques.
Requirements
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
- 2-10+ years of industry experience or relevant academic/project experience in Physical Design.
- Experience in ASIC/SoC Physical Design implementation.
- Experience with Place and Route using Cadence Innovus and/or Synopsys Fusion Compiler.
- Experience with Static Timing Analysis and timing closure using Synopsys PrimeTime SI.
- Experience with Physical verification and design sign-off methodologies.
- Experience with Formal verification techniques and tools.
- Experience with Power domain implementation and low-power design methodologies.
- Experience with Clock Tree Synthesis (CTS), routing, and timing optimization.
- Experience with Low power implementation techniques.
- Experience with Signal integrity, noise analysis, and MMMC sign-off flows.
- Experience with DFT-aware physical implementation and constraint management.
- Experience with programming and automation using Python, Perl, TCL, Shell scripting, C/C++, and Linux/Unix environments.
- Perl/Tcl, Python skills are needed.
- Strong problem solving and ASIC development/debugging skills.
- Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
- Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
- PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Skills
- Physical Design
- ASIC/SoC Physical Design implementation
- Place and Route
- Cadence Innovus
- Synopsys Fusion Compiler
- Static Timing Analysis
- Synopsys PrimeTime SI
- Physical verification
- Design sign-off methodologies
- Formal verification
- Power domain implementation
- Low-power design methodologies
- Clock Tree Synthesis (CTS)
- Routing
- Timing optimization
- Low power implementation techniques
- Signal integrity
- Noise analysis
- MMMC sign-off flows
- DFT-aware physical implementation
- Constraint management
- Python
- Perl
- TCL
- Shell scripting
- C/C++
- Linux/Unix environments
- Problem solving
- ASIC development/debugging
Location
- Remote
Work Type
- Full-time
Experience Level
- 2-10+ years
- 4+ years
- 3+ years
- 2+ years
Education Level
- Bachelor's degree
- Master's degree
- PhD
Salary/Compensations
- $145,600.00 - $218,400.00
Benefits
- Competitive annual discretionary bonus program
- Opportunity for annual RSU grants
- Highly competitive benefits package
About the Company
- As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drive communication and data processing transformation, helping create a smarter, more connected future for all.
Equal Opportunity
- Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.