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About the Role
We are seeking a highly motivated RTL IP Design Engineer to join AMD's Security IP (SECIP) Design team. The team is responsible for the architecture, design, and verification of embedded microprocessor subsystems and hardware accelerators critical to enhancing performance, functionality, security, and efficiency across AMD SoC products.
Responsibilities
- Develop and maintain block-level RTL IP and MP subsystem specifications, microarchitecture, RTL implementations, and associated design methodologies and infrastructure.
- Design, implement, and debug RTL solutions using AI-powered methodologies, directed C-DPI based testing, and verification team testbenches and regression environments, to achieve functional and coverage closure.
- Analyze regression failures, debug simulations, evaluate coverage results, and collaborate with design, verification, and implementation teams to achieve functional and design-quality closure, including lint, timing, DFT, DFP, and other signoff requirements.
- Contribute to verification planning by reviewing feature specifications, defining test plans, influencing testbench architecture, and promoting design-for-verification best practices.
- Debug and resolve subsystem and SoC integration issues in collaboration with SoC Integration, SoC Design Verification, emulation, and post-silicon validation teams.
- Provide technical leadership in IP architecture, RTL design methodologies, and critical problem resolution, commensurate with experience level.
Requirements
- Strong understanding of CPU and embedded microprocessor subsystem architectures, datapath-oriented accelerator microarchitectures, and FPGA-based emulation and prototyping methodologies.
- Solid knowledge of both traditional and AI-powered RTL design and verification methodologies, industry best practices, and C-DPI based verification techniques.
- Strong understanding of industry-standard bus and interface protocols, including AXI, AHB, and AMBA.
- Experience with ASIC development tools and flows, including simulation, debug, linting, synthesis, timing analysis, and power-aware verification.
- Domain-specific expertise in security, processor subsystems, accelerators, or related areas, along with demonstrated technical leadership capabilities for senior-level candidates.
Skills
- Verilog
- SystemVerilog
- Python
- Tcl
- Perl
- Ruby
- Make
Location
- Austin, TX
- Markham, ON
Work Type
- Full-time
Experience Level
- Senior-level candidates
Education Level
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline.
- Master's degree preferred.
Benefits
- AMD benefits at a glance.
About the Company
- At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.
- Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward.
Equal Opportunity
- AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.
- We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.