Impress employers and recruiters.
Choose from hundreds of resume examples.

Target Resume Now

Tailor your resume to this Silicon Packaging Engineer role.

Rezi rewrites your resume against Meta's job description. Free.

Resume score gauge reading 58 out of 100

Don't guess if your resume is good enough.

See how it scores against the Silicon Packaging Engineer posting at Meta — free, in seconds.

About the Role

Meta is seeking an experienced Silicon Packaging Engineer to join its Ecosystem and Technical Operation team. This role involves prioritizing workstreams in a cross-functional engineering environment and contributing to the development of custom silicon and optimal packaging solutions for AI/ML products and system-level performance. The Infrastructure team designs, builds, and integrates hardware systems powering Meta's platforms, with designs published through the Open Compute Project Foundation.

Responsibilities

Perform package design for AI/ML and networking applications custom Si with single-chip/multi-chip and SiP/module packaging, design feasibility studies and analyses to ensure good manufacturing at ODM
Lead development of next-generation advanced packaging technologies from concept to product, including test vehicle definition and building with ecosystem partners
Work with internal Si, architecture and system teams, and externally with engaged partners, ODM, design houses and OSAT companies
Perform design analysis and what-if scenarios for novel packaging schemes such as 2.5D/3D and heterogeneous integration to improve package form factor for next-generation versions of current products
Influence ASIC vendors, foundry, ODM and OSAT partners' roadmaps and align with Meta ASIC roadmaps for the development of advanced packaging technologies (SMT, solder ball attach, and other assembly process)
Participate early in Si/package/PCB/system co-design and ODM SMT manufacturing work in product development design reviews, providing feedback on manufacturability and helping incorporate the latest technology advancements and design rules
Create, conduct and analyze Design of Experiments (DOE) for development and sustaining activities
Work cross-functionally with design, NPI, quality and reliability, and manufacturing teams, and support new technology integration into products
Support selection and qualification of external partners (ODM, OEM, OSAT)
Collaborate with internal and external stakeholders to ensure seamless integration of packaging technology into product development cycles
Stay abreast of the latest advancements in advanced packaging technologies and market trends
Identify and evaluate emerging technologies with potential for future applications
Ability to travel internationally, typically once per quarter

Requirements

Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
Master's degree in Materials Science, Mechanical Engineering, Electrical Engineering, or a related field, or equivalent practical experience
8+ years of experience in semiconductor packaging with direct ownership of advanced packaging development and assembly process and manufacturing
In-depth knowledge of flip chip, 2.5D and 3D packaging technologies
Experience taking products from concept to production, including development of manufacturing specifications, vendor qualifications, and improvement of manufacturing efficiencies and costs
Experience communicating technical packaging decisions in writing and in reviews to cross-functional engineering and manufacturing stakeholders
Experience working effectively with cross-functional teams
Willingness to travel internationally, typically once per quarter

Skills

Hardware development
Integration of machine learning clusters
AI/HPC hardware development
Data-driven approach
Flip chip
2.5D packaging technologies
3D packaging technologies
Semiconductor packaging
Advanced packaging development
Assembly process
Manufacturing
Manufacturing specifications
Vendor qualifications
Manufacturing efficiencies
Costs improvement
Technical communication
Cross-functional team collaboration
ODM
Assembly packaging
OSAT
Foundry partners
Packaging and assembly industry standards
Fanout advanced packaging technologies
Interposer design
Fanout package design
Organic interposer
Inorganic interposer
CoWoS-L
CoWoS-R
EMIB
Embedded fanout bridge
Semiconductor packaging design
SMT processes
PCB design
Layout tools
Failure mechanisms
Analytical techniques
Silicon interposers
TSVs
Microbumps
Board-assembly constraints

Location

Work Type

Full-time

Experience Level

8+ years of experience in semiconductor packaging

Education Level

Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
Master's degree in Materials Science, Mechanical Engineering, Electrical Engineering, or a related field, or equivalent practical experience
Master's degree or PhD in Materials Science, Mechanical Engineering, or a related discipline

Salary/Compensations

$146,000/year to $209,000/year

Benefits

bonus
equity
benefits

About the Company

The Meta Infrastructure team designs, builds, brings-up, tests and integrates hardware systems that power Meta’s platforms, deployed in data centers worldwide, from silicon to sheet metal. Designs are published through the Open Compute Project Foundation. This is an opportunity to join our team and help us build some of the world’s most open and efficient machine learning platforms. We are building a competency in packaging design and technology to support the development of custom silicons for Infrastructure hardware as well as to develop packaging solutions that are optimal for our AI/ML products and system level performance.