Senior Verification Engineer – High Speed Coherent Interconnect Hub at NVIDIA | CA | Rezi

Senior Verification Engineer – High Speed Coherent Interconnect Hub at NVIDIA

Senior Verification Engineer – High Speed Coherent Interconnect Hub

NVIDIA · CA

2 weeks ago

Senior Verification Engineer – High Speed Coherent Interconnect Hub

NVIDIA · CA

15 days ago
Resume preview

Impress employers and recruiters.
Choose from hundreds of resume examples.

Target Resume Now
Resume preview

Tailor your resume to this Senior Verification Engineer – High Speed Coherent Interconnect Hub role.

Rezi rewrites your resume against NVIDIA's job description. Free.

Resume score gauge reading 58 out of 100

Don't guess if your resume is good enough.

See how it scores against the Senior Verification Engineer – High Speed Coherent Interconnect Hub posting at NVIDIA — free, in seconds.

About the Role

NVIDIA is seeking a motivated and creative Senior Verification Engineer to join our Tegra SoC IP Verification team. In this role, you will work closely with architecture and design teams to verify complex High Speed Coherent Interconnect Hub IP, helping to define verification strategies, develop robust verification environments, and drive functional and performance verification. This position offers an opportunity to work on technologies at the heart of NVIDIA's next-generation computing platforms.

Responsibilities

  • Develop and maintain verification infrastructure, including testbenches, BFMs, checkers, monitors, scoreboards, assertions, and constrained-random stimulus.
  • Define, review, and complete verification test plans for coherency protocol, ordering, error handling, performance, and other key IP features.
  • Verify protocol compliance and interoperability across complex SoC and multi-chip interfaces.
  • Develop and complete performance test plans to validate bandwidth, latency, QoS, and other performance requirements.
  • Drive functional and code coverage closure and toward verification signoff.
  • Debug complex RTL and verification issues and work closely with architecture and design teams to drive them to resolution.
  • Collaborate with FPGA, emulation, software, and post-silicon teams to support system validation and silicon bring-up.

Requirements

  • BS / MS or equivalent experience.
  • 3+ years of ASIC verification experience with complex IPs or SoC subsystems.
  • Strong background in SystemVerilog, UVM, constrained-random verification, and coverage-driven verification methodologies.
  • Experience developing verification environments, checkers, assertions, and functional coverage.
  • Strong debugging and problem-solving skills with experience using industry-standard simulation and debug tools.

Skills

  • SystemVerilog
  • UVM
  • Constrained-random verification
  • Coverage-driven verification
  • Verification environments
  • Checkers
  • Assertions
  • Functional coverage
  • Debugging
  • Problem-solving
  • High-speed coherent interconnects
  • NoCs
  • SoC infrastructure IP
  • Coherent interconnect protocols
  • CHI
  • AXI
  • Cache coherency
  • Transaction ordering
  • System-level data flows
  • Performance verification
  • Bandwidth
  • Latency
  • QoS
  • Traffic management
  • Python scripting
  • Perl scripting
  • Shell scripting
  • Communication skills
  • Collaboration skills

Location

  • Hybrid

Work Type

  • Hybrid
  • Full-time

Experience Level

  • Senior
  • Level 3
  • Level 4

Education Level

  • BS
  • MS

Salary/Compensations

  • 125,000 CAD - 175,000 CAD for Level 3
  • 155,000 CAD - 205,000 CAD for Level 4

Benefits

  • Equity
  • Benefits package

About the Company

  • NVIDIA is widely considered to be one of the technology world’s most desirable employers.
  • We welcome you join our team with some of the most hard-working people in the world working together to promote rapid growth.
  • Are you passionate about becoming a part of a best-in-class team supporting the latest in GPU and AI technology?

Equal Opportunity

  • NVIDIA uses AI tools in its recruiting processes.