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About the Role
Join our newly formed verification team as a Design Verification Engineer to own the functional verification of blocks and subsystems in our SoC, including Efficient's proprietary Fabric technology. You will collaborate with senior DV engineers, RTL designers, and architects to build testbenches, close coverage, and identify bugs before silicon.
Responsibilities
- Develop and maintain UVM/SystemVerilog testbenches, sequences, and tests for block- and subsystem-level verification.
- Write verification plans from design specifications in collaboration with design and architecture teams.
- Write SystemVerilog assertions and functional coverage models, and drive coverage to closure.
- Debug simulation failures, working with designers to root-cause and fix issues.
- Contribute to regression infrastructure, automation, and dashboards that track verification progress.
- Support gate-level simulation and other sign-off activities.
Requirements
- Bachelor's or Master's/PhD degree in Electrical Engineering, Computer Engineering, or a related field.
- 4+ years of experience in ASIC/SoC design verification, with multiple projects taken through tapeout.
- Hands-on experience building and extending UVM testbench components (agents, scoreboards, sequences) and constrained-random tests.
- Experience defining functional coverage and driving code and functional coverage closure at block or subsystem level.
- Working knowledge of SystemVerilog Assertions.
- Ability to independently debug simulation failures using waveforms, logs, and design knowledge.
- Proficiency in Python for test automation, log analysis, and regression flows.
- Ability to clearly report verification status and issues to the team.
Skills
- UVM
- SystemVerilog
- Python
- C/C++
- Formal verification
- JasperGold
- AI agentic flows
- Computer architecture
- Dataflow architectures
- Power-aware verification
- UPF
Experience Level
- 4+ years
Education Level
- Bachelor's degree
- Master's degree
- PhD degree
Salary/Compensations
- $130,000 to $180,000
Benefits
- 10% annual bonus
- Meaningful equity
- Comprehensive benefits
- 401(k) match
- Company-paid benefits
- Paid parental leave
- Flexibility
About the Company
- Efficient Computer is rethinking computing from the ground up to solve one of AI's biggest challenges: energy.
- Our Fabric architecture delivers a 10–100x improvement in energy efficiency for general-purpose computation, including AI, while supporting familiar programming languages and software frameworks—unlocking new possibilities for autonomous machines, intelligent infrastructure, wearables, and space systems.
- With our first processor, Electron E1, now shipping in volume and more than $97 million in Series B financing recently announced, we're accelerating customer deployments and scaling our architecture to data center performance.
- Join us to build the hardware and software that bring intelligence wherever it's needed and help shape the next generation of computing.