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About the Role
SiTime is seeking a Sr. Layout Design Engineer to lead top-level chip-planning and perform block-level custom layouts for CMOS and BiCMOS circuits. This role involves reviewing and coordinating work from offshore designers, training junior engineers, and contributing to the development of standard layout methodologies and quality procedures.
Responsibilities
- Lead top-level chip-planning and perform functional-block-level, block-level, sub-block level, leaf cell, and standard cell custom layouts for CMOS and BiCMOS circuits.
- Perform schematic-driven layout and design constraints.
- Design die-area efficient layouts according to circuit designer requirements.
- Perform block or top-level layout designs.
- Perform floor-planning, power line planning, shielding, and device-matching layout.
- Verify layouts, ensuring they pass DRC, LVS, and ERC.
- Contribute to various chip-level routing and layout needs.
- Perform chip-level integration, verifications, and tape-out.
- Support other projects as needed by management.
- Train junior layout engineers and offshore layout contractors.
- Contribute to developing common best practices and workflow across all sites.
- Contribute to building processes and procedures to achieve high layout quality.
- Requires remote interfacing with local and global design and layout teams in multiple design centers across different time zones.
Requirements
- BA/BS Degree in Layout Design or related field or equivalent experience.
- 10 years’ experience with layout design for analog and full-custom digital blocks.
- Experience with TSMC 180nm, 65nm, and 22nm process technologies.
- Proficient in using layout editing tools in the Cadence Virtuoso design environment.
- Solid working knowledge of debugging DRC/LVS/ERC with Cadence PVS or Mentor Calibre.
- Conceptual understanding of layout topics such as parasitic, matching, crosstalk, transistor layout dependent effects, latch-up, IR drop, electro migration (EM), and deep N-well and NTN isolation.
- Strong capability of solving device matching, electro-migration, signal integrity, and power distribution problems while meeting area constraints.
- Experience in chip-level floor planning and analog block integration.
- Experience with chip-level integration, verifications, and tape-out.
- Ability to use productivity-enhancing tools and design scripts to further automate tasks is also desirable.
- Must be able to lift, push, and pull up to 5 lbs.
Skills
- Layout Design
- CMOS circuits
- BiCMOS circuits
- Schematic-driven layout
- Design constraints
- Die-area efficient layouts
- Floor-planning
- Power line planning
- Shielding
- Device matching
- DRC
- LVS
- ERC
- Chip-level integration
- Verifications
- Tape-out
- Cadence Virtuoso
- Cadence PVS
- Mentor Calibre
- Parasitic
- Matching
- Crosstalk
- Transistor layout dependent effects
- Latch-up
- IR drop
- Electro migration (EM)
- Deep N-well
- NTN isolation
- Device matching
- Electro-migration
- Signal integrity
- Power distribution
- Chip-level floor planning
- Analog block integration
- Productivity-enhancing tools
- Design scripts
- Attention to detail
- Organization
- Accuracy
- Efficient layout techniques
- On-time work delivery
- Self-motivated
- Team player
- Communication skills
- Collaboration
Work Type
- Remote
Experience Level
- 10 years’ experience
- Sr.
Education Level
- BA/BS Degree in Layout Design or related field or equivalent experience
Salary/Compensations
- Eligible for a quarterly bonus tied to the achievement of innovation goals
- Equity grants
About the Company
- SiTime is the Precision Timing company.
- Timing is the heartbeat of all electronics, ensuring performance, resilience and scalability.
- MEMS-based Precision Timing delivers greater accuracy, smaller size and resilience.
- Today, MEMS timing powers over 400 applications, including high-growth ones in AI datacenters, automated driving, industrial and humanoid robots, wearables and IoT.
- Our semiconductor MEMS programmable solutions offer a rich feature set that enables customers to differentiate their products with higher performance, smaller size, lower power, and better reliability.
- With more than 4 billion devices shipped, SiTime is changing the timing industry.
- For more information, visit: www.sitime.com.
Equal Opportunity
- SiTime is committed to providing equal employment opportunities to all employees and applicants.
- Employment decisions are based on qualifications, merit, and business needs.
- We do not discriminate on the basis of any characteristic protected by applicable law.