Impress employers and recruiters.
Choose from hundreds of resume examples.
Impress employers and recruiters.
Choose from hundreds of resume examples.
Tailor your resume to this FPGA IP Design Engineer - Intern role.
Rezi rewrites your resume against Altera's job description. Free.
Tailor your resume to this FPGA IP Design Engineer - Intern role.
Rezi rewrites your resume against Altera's job description. Free.
Don't guess if your resume is good enough.
See how it scores against the FPGA IP Design Engineer - Intern posting at Altera — free, in seconds.
Don't guess if your resume is good enough.
See how it scores against the FPGA IP Design Engineer - Intern posting at Altera — free, in seconds.
About the Role
Altera is seeking a FPGA IP Design Engineer - Intern to join the IP Systems and Solutions Engineering (IPSS) team. This role involves developing comprehensive solutions for Altera's FPGA devices, focusing on highly configurable intellectual property (IP) cores. You will work on advanced device architectures, design definition, implementation, and verification, contributing to state-of-the-art memory interface, chip-to-chip, or transceiver-based IP cores.
Responsibilities
- Architecture and Design based on the latest protocol specifications for memory, chip-to-chip, or transceiver interfaces
- RTL development
- Device support and CAD tool integration
- Verification (e.g. verification IP, methodologies, frameworks, bus functional models, regression tests)
- Hardware power-on and debug
- New product release and rollout support, customer technical support.
Requirements
- Must be pursuing a Bachelor's Degree in computer engineering, electrical engineering, engineering science, computer science, mathematics, or similar
- 3+ months of experience or coursework in one, or more, of the following: Software programming and/or scripting (e.g. C/C++, Python), digital logic, RTL design (e.g. SystemVerilog, Verilog, VHDL), or similar
- FPGA design experience
- Experience with RTL simulation, timing closure, STA
- Experience with Memory Interfaces
- Eligible for any required Canada export authorizations.
Skills
- C/C++
- Python
- SystemVerilog
- Verilog
- VHDL
- RTL simulation
- Timing closure
- STA
- Memory Interfaces
Location
- Toronto, Ontario, Canada
Work Type
- Student / Intern (Fixed Term)
Experience Level
- Intern
Education Level
- Bachelor's Degree
Salary/Compensations
- $95K – $100K CAD
Benefits
- Performance-based incentive opportunities
About the Company
- Altera develops comprehensive solutions for FPGA devices, providing customers with easy and efficient access to device capabilities through highly configurable intellectual property (IP) cores integrated with their software CAD tool, Quartus Prime.
Equal Opportunity
- All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.