Hardware Engineer 3 at Hewlett Packard Enterprise | CA, US | Rezi

Hardware Engineer 3 at Hewlett Packard Enterprise

Hardware Engineer 3

Hewlett Packard Enterprise · CA, US

3 weeks ago

Hardware Engineer 3

Hewlett Packard Enterprise · CA, US

24 days ago
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About the Role

The Hardware Engineer will be a key contributor in the Hardware Sustaining group, responsible for investigating and remediating critical hardware issues involving Juniper’s flagship networking products. This role drives hardware quality improvements into next-generation products based on lessons learned from investigations.

Responsibilities

  • Lead failure analysis for critical hardware issues reported from field and factory, determining and documenting root cause and corrective actions (RCCA).
  • Extract and share "Lessons Learned" from HW Sustaining failure analysis with appropriate Juniper teams to drive hardware quality improvement.
  • Collaborate with Engineering and Manufacturing/Operations teams to drive corrective actions and hardware quality improvements.
  • Work with Customer Support teams to understand and address customer hardware concerns.
  • Analyze hardware quality metrics and Repair Center findings to identify failure trends requiring investigation.
  • Provide technical leadership into multi-sourcing and change management activities on shipping products.
  • Review hardware test reports for new products prior to product release, identifying quality concerns and working with design teams to resolve.
  • Mentor and guide junior members, foster a collaborative environment, and encourage curiosity and knowledge sharing.

Requirements

  • Bachelor’s degree or higher in Electrical, Electronics, or Computer Engineering.
  • 8+ years of hardware design, debug and testing experience at the board and system level.
  • Expertise in debugging hardware problems using oscilloscopes, logic analyzers, and specialized networking test equipment such as IXIA/Spirent traffic analyzers, PCI analyzers, and in-circuit emulators.
  • PCB design experience including schematic capture, PCB layout and routing.
  • Familiarity with Cadence System Design tool suite.
  • Knowledge of networking hardware and associated components and interfaces such as switch ASICs, PHY, SerDes, CPU subsystems, optics, high-speed serial links, PoE, PCIe, NVMe, SATA, I2C, and USB.
  • Expertise in high-speed circuit design and debug.
  • Familiarity with signal and power integrity concepts and associated test and simulation tools.
  • Ability to manage multiple concurrent priorities and make progress.
  • Able to manage hardware debug and design projects and driving them to closure.
  • Good verbal and written communication skills.
  • Ability to communicate and collaborate effectively with cross-functional teams, vendors and customers.
  • Team player with superior collaborative and project leadership skills and a focus on driving results.
  • Experience in FPGA design and debug.
  • Familiar with Verilog HDL and common FPGA design and simulation tool suites.
  • Familiarity with Engineering Change Management and Product Lifecycle Management tools such as Agile PLM.

Skills

  • Hardware design
  • Hardware debug
  • Hardware testing
  • Oscilloscopes
  • Logic analyzers
  • IXIA/Spirent traffic analyzers
  • PCI analyzers
  • In-circuit emulators
  • PCB design
  • Schematic capture
  • PCB layout
  • PCB routing
  • Cadence System Design tool suite
  • Networking hardware
  • Switch ASICs
  • PHY
  • SerDes
  • CPU subsystems
  • Optics
  • High-speed serial links
  • PoE
  • PCIe
  • NVMe
  • SATA
  • I2C
  • USB
  • High-speed circuit design
  • Signal integrity
  • Power integrity
  • FPGA design
  • FPGA debug
  • Verilog HDL
  • Agile PLM

Location

  • Onsite

Work Type

  • Onsite

Experience Level

  • 8+ years of hardware design, debug and testing experience
  • Job Level: TCP_03

Education Level

  • Bachelor’s degree or higher in Electrical, Electronics, or Computer Engineering

Salary/Compensations

  • United States of America: Annual Salary USD 109,500 - 220,500 in California
  • United States of America: Annual Salary USD 95,800 - 220,500 in Oregon & Utah & Washington

Benefits

  • Health & Wellbeing
  • Personal & Professional Development
  • Unconditional Inclusion
  • Information about employee benefits offered in the US can be found at https://myhperewards.com/main/new-hire-enrollment.html

About the Company

  • Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work.
  • We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world.
  • Our culture thrives on finding new and better ways to accelerate what’s next.
  • We know varied backgrounds are valued and succeed here.
  • We have the flexibility to manage our work and personal needs.
  • We make bold moves, together, and are a force for good.
  • If you are looking to stretch and grow your career our culture will embrace you.
  • Open up opportunities with HPE.
  • Job: Engineering

Equal Opportunity

  • HPE is committed to creating an inclusive and accessible workplace and encourages applications from all qualified individuals, including those with disabilities.
  • HPE is an Equal Employment Opportunity/ Veterans/Disabled/LGBT employer.
  • We do not discriminate on the basis of race, gender, or any other protected category, and all decisions we make are made on the basis of qualifications, merit, and business need.
  • Our goal is to be one global team that is representative of our customers, in an inclusive environment where we can continue to innovate and grow together.
  • Please click here: Equal Employment Opportunity.
  • Hewlett Packard Enterprise is EEO Protected Veteran/ Individual with Disabilities.
  • HPE will comply with all applicable laws related to employer use of arrest and conviction records, including laws requiring employers to consider for employment qualified applicants with criminal histories.