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About the Role
Graphcore is seeking Post-Silicon Validation Engineers to join their collaborative, cross-functional development team validating cutting-edge, high-performance AI chips and platforms. You will play a critical role in supporting new product introductions and post-silicon validation, bringing first silicon to life, functionally validating it, and working closely with other teams to ensure it becomes a fully characterized and working product. This role involves leading, mentoring, and providing technical guidance to other engineering team members, and leveraging experience to architect and drive improvements to test infrastructure and processes.
Responsibilities
- Plan, design, develop and debug silicon validation tests in bare metal C/C++ on FPGA/Emulator prior to first silicon
- Deploy silicon validation tests on first silicon and debugging them
- Develop automated test framework and regression test suites in Python to optimize validation efficiency
- Collaborate closely with engineers from many other disciplines on a variety of topics
- Work with Validation and Production Test engineering peers to implement best practices and continuous improvements to test methodologies
- Analyse test results, identify and debug failures/defects
- Contribute to shared test and validation infrastructure
- Provide feedback to architects
Requirements
- Strong experience in Bare metal / embedded C/C++
- Good knowledge of digital ASICs
- Be highly motivated, a self starter, and a team player
- Ability to work across teams and programming languages to find root causes of deep and complex issues
- Experience of the post-silicon validation process applied in digital ASIC environments
- Python, Linux
- Excellent communication skills and the ability to collaborate with others to solve problems
- Excellent problem-solving, analytical & diagnostic skills
- Driver level experience with one or more of the following is highly desirable: PCIe, Ethernet, Memory technologies (LPDDR, DDR, HBM, …), Other peripherals such as I2C, I3C, SPI, …
- Good knowledge of mixed-signal building blocks such as PLLs, high speed PHYs and IC control/communication protocols is highly desirable
- Experience of Arm CPUs, System IP and debug tools
- Experience of AMBA protocols
- Understanding of ML applications and their workloads
- Experience in Characterization, Failure Analysis, Test Development, Statistical analysis, and Customer Support
Skills
- Bare metal C/C++
- Digital ASICs
- Python
- Linux
- PCIe
- Ethernet
- LPDDR
- DDR
- HBM
- I2C
- I3C
- SPI
- Mixed-signal building blocks
- PLLs
- High speed PHYs
- IC control/communication protocols
- Arm CPUs
- System IP
- Debug tools
- AMBA protocols
- ML applications
- Characterization
- Failure Analysis
- Test Development
- Statistical analysis
- Customer Support
Location
- Austin
Work Type
- Full-time
Experience Level
- Senior
Salary/Compensations
- $156,500 - $211,700
Benefits
- Competitive benefits package
- Phantom Equity
About the Company
- Graphcore is a globally recognised leader in Artificial Intelligence computing systems.
- The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption.
- As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies.
- We are opening a new AI Engineering Campus in Austin which will play a central role in Graphcore's work building the future of AI computing.
Equal Opportunity
- We offer an equal opportunity process and understand that there are visible and invisible differences in all of us.
- We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments.