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About the Role
The Layout Tape-Out Support Engineer is responsible for end-to-end tape-out execution for Gallium Nitride (GaN) technologies. This role supports multiple concurrent tape-out flows, ensuring accurate, high-quality mask data delivery while enabling effective collaboration across global and Japanese-speaking teams.
Responsibilities
- Perform and support PCM (Process Control Monitor) layout development and verification.
- Design and maintain alignment mark layouts in compliance with lithography and process requirements.
- Support stepper reticle 1:1 aligner mask layout generation, validation, and optimization.
- Run Design Rule Checks (DRC) and mask data validation.
- Support tape-out operations across multiple flows, ensuring schedule adherence and high-quality deliverables.
- Collaborate with global and Japanese-speaking stakeholders to drive alignment across design, process, and mask vendors.
- Provide operational support for tape-out activities.
- Execute mask data generation workflows in accordance with foundry requirements.
- Perform mask data verification and signoff, ensuring format accuracy and rule compliance.
- Conduct MEBES data checks to ensure mask write readiness.
- Manage tape-out (TO) submissions and mask ordering processes.
- Track purchase orders (POs) associated with mask fabrication.
- Coordinate with mask vendors on scheduling, delivery, and issue resolution.
- Perform thorough verification of mask data integrity, PCM structures, and alignment features.
- Ensure all deliverables comply with internal standards and external vendor specifications.
Requirements
- Bachelor’s or Master’s degree in Electrical Engineering, Materials Science, Physics, or a related field.
- Familiarity with reticle design and mask data preparation flows is desirable.
- Basic understanding of mask data formats (e.g., MEBES/JobDeck) and mask house interactions.
- Proficiency in layout and verification tools such as Cadence and Calibre is required.
- Experience working in a Unix/Linux environment is required.
- LEDIT experience is a plus.
- A quick learner with strong adaptability.
- Excellent communication skills.
- A self-motivated, proactive mindset.
- Japanese language proficiency required.
- Good communication skills in English, with the ability to effectively collaborate with internal English-speaking teams and stakeholders.
Skills
- Reticle design
- Mask data preparation
- Mask data formats (MEBES/JobDeck)
- Cadence
- Calibre
- Unix/Linux environment
- LEDIT
- Cross-cultural communication
- Problem-solving
- Execution
Location
- Remote Work Available: No
Work Type
- Regular (PERM)
Education Level
- Bachelor’s or Master’s degree in Electrical Engineering, Materials Science, Physics, or a related field.
Benefits
- Competitive compensation
- Comprehensive benefits package
About the Company
- Renesas is a global company providing embedded semiconductor solutions with the purpose of 'To Make Our Lives Easier'. We contribute to a safer, healthier, more environmentally friendly, and smarter future through world-leading technology development in automotive, industrial, infrastructure, and IoT fields, alongside over 21,000 engineers and problem-solving professionals active in more than 30 countries worldwide.
- At Renesas, 'TAGIE (Transparent, Agile, Global, Innovative, Entrepreneurial)' is at the core of our corporate culture. TAGIE supports how we work, grow, and pursue our Purpose. This collaborative spirit and challenging mindset enable us to transform industries through semiconductor technology and contribute to people's lives worldwide.
- We offer a competitive compensation system and a comprehensive benefits package. Details regarding benefits will be provided during the selection process.
- Join us in the challenge of creating the future. We look forward to your applications.