Impress employers and recruiters.
Choose from hundreds of resume examples.

Target Resume Now

Tailor your resume to this Senior Staff Engineer, Physical Design role.

Rezi rewrites your resume against Samsung Electronics's job description. Free.

Resume score gauge reading 58 out of 100

Don't guess if your resume is good enough.

See how it scores against the Senior Staff Engineer, Physical Design posting at Samsung Electronics — free, in seconds.

About the Role

Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL) are building a center of excellence for Intellectual Property (IP) applied to high-performance computing devices. This role will shape the physical implementation and methodology innovation for high-performance GPU and system-level IP, enabling market-differentiating power, performance, and area (PPA) goals.

Responsibilities

Contribute to key stages of the physical design flow, from synthesis through floorplanning, timing closure, and signoff.
Advance implementation strategies, methodology innovation, and scalable execution across parallel development cycles.
Collaborate with hardware, advanced design technology, and system-level teams to resolve complex implementation challenges.
Shape full-chip and block-level implementation, including floorplanning, placement, routing, timing closure, and signoff for complex GPU and SoC designs.
Contribute to implementation strategies to achieve market-differentiating PPA targets, including power optimization, congestion management, STA-driven convergence, and reliability considerations.
Advance methodology and flow innovation, including automation, tool optimization, and scalable design practices.
Enable cross-functional collaboration with architecture, RTL, advanced design technology, software, system-level teams, and external vendors.
Inspire high performance by mentoring junior engineers, fostering a culture of ownership, accountability and innovation, and promoting continuous learning.

Requirements

11+ years of experience with a Bachelor’s Degree in Computer Science/Engineering, or 9+ years of experience with a Master’s Degree, or 7+ years of experience with a Ph.D.
7+ years of hands-on experience with full physical design implementation flows, including synthesis, place-and-route, clock tree synthesis (CTS), timing closure, and signoff.
Strong expertise in physical design implementation for complex GPU or SoC designs, including low-power design, physical verification (DRC/LVS), and advanced-node challenges.
Strong experience with timing analysis and convergence methodologies, including STA, signal integrity, and reliability considerations.
Strong proficiency with industry-standard EDA tools (Synopsys or Cadence: ICC2/Fusion Compiler or Innovus, PrimeTime/Tempus, StarRC).
Strong scripting and automation skills in Python, Tcl, Shell, or Perl.
Strong analytical, debugging, and problem-solving skills with a data-driven approach.
Experience with leading technical initiatives, driving process and methodology innovation, and mentoring engineers.
Excellent collaboration and communication skills, with the ability to navigate ambiguity and influence stakeholders.
Experience with advanced-node designs (≤5nm) and high-performance GPU or SoC programs.
Experience with DTCO methodologies and implementation scalability challenges.
Applicants must be authorized to access information subject to U.S. export control laws or eligible for government authorization.

Skills

Physical Design
Synthesis
Place-and-Route
Clock Tree Synthesis (CTS)
Timing Closure
Signoff
Low-power design
Physical Verification (DRC/LVS)
Timing Analysis
Signal Integrity
Reliability Considerations
EDA Tools (Synopsys/Cadence)
Scripting (Python, Tcl, Shell, Perl)
Automation
Analytical Skills
Debugging
Problem-Solving
Technical Leadership
Mentoring
Collaboration
Communication
Advanced-node designs (≤5nm)
High-performance GPU/SoC
DTCO methodologies
Implementation scalability

Location

Austin

Work Type

Full-time
Exempt

Experience Level

Senior Staff
11+ years with Bachelor's Degree
9+ years with Master's Degree
7+ years with Ph.D.

Education Level

Bachelor's Degree in Computer Science/Engineering
Master's Degree
Ph.D.

Salary/Compensations

$180,200 - $270,400

Benefits

Medical
Dental
Vision
Life Insurance
401(k)
Onsite Lunch
Employee Purchase Program
Tuition Assistance (after 6 months)
Paid Time Off
Student Loan Program
Wellness Incentives
MBO Bonus Compensation
Long Term Incentive Plan (potential)
Relocation (potential)

About the Company

Samsung is a world leader in advanced semiconductor technology.
Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL) are building a center of excellence for Intellectual Property (IP) applied to high-performance computing devices.
The Advanced Design Technology and Design Implementation teams enable GPU and system-level development within Samsung SARC/ACL and the broader System LSI organization.
These teams operate at the intersection of design technology and physical implementation, partnering closely with Foundry from early technology exploration through the full development cycle.
They accelerate adoption of leading technology nodes and deliver optimized power, performance, area (PPA), silicon quality, and turnaround time for next-generation IP solutions.
Join a highly collaborative, fast-paced environment working across parallel development cycles with direct impact on consumer technologies used worldwide.

Equal Opportunity

Samsung Electronics America, Inc. and its subsidiaries are committed to employing a diverse workforce, and provide Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.