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About the Role
Be part of a team that develops custom silicon solutions for Google's direct-to-consumer products. Contribute to the innovation behind products loved by millions worldwide. Shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Contribute to all phases of complex CPU subsystem designs from specification to productization and integration into target SOCs. Lead and manage a front-end design team, collaborating with architecture, software, verification, power, DFT, and physical design teams to define micro-architecture and schedules for high-quality RTL that meets project goals. Help your team grow and solve technical problems with innovative micro-architecture and practical logic solutions. Evaluate and decide on the best design options considering complexity, performance, power, area, and schedule.
Responsibilities
- Lead and manage a team of design engineers working on CPU functional units, emphasizing micro-architecture and RTL design for the next generation CPU subsystem.
- Review and propose performance-enhancing micro-architecture features, and work with Software, Architect, and Performance teams for trade-off studies.
- Communicate the pros and cons of micro-architecture enhancements.
- Deliver plans for achieving project milestones and goals, towards a design that meets production quality on schedule.
- Work with the Verification team to ensure production of quality designs, and the physical design and power teams to meet frequency, power, and area goals.
- Focus on load-store-unit and cache subsystem design and optimizations with other parts of CPU to deliver best Performance, Power, Area (PPA).
Requirements
- Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
- 15 years of experience in CPU design, including load-store unit logic/RTL and L2/L3 private/shared caches including micro-architecture definition and PPA processing.
- Experience leading and managing teams for modern processor subsystems with high speed, lower power design.
- Experience with front-end quality checks (e.g., Lint, CDC/RDC).
Skills
- CPU design
- Load-store unit logic/RTL
- L2/L3 private/shared caches
- Micro-architecture definition
- PPA processing
- Team leadership and management
- High-speed, low-power design
- Front-end quality checks (Lint, CDC/RDC)
- ARM instruction set architecture
- Mobile CPU subsystem design
- Mobile SOC architecture/integration
Experience Level
- 15 years of experience in CPU design
Education Level
- Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
Salary/Compensations
- US: $240000 - $333000 (USD) + 25% bonus target + equity
Benefits
- 25% bonus target
- equity
- benefits
About the Company
- Google's mission is to organize the world's information and make it universally accessible and useful.
- Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences.
- We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful.
- We aim to make people's lives better through technology.