Senior CPU RTL Design Engineer at Intel Corporation | AZ, US | Rezi

Senior CPU RTL Design Engineer at Intel Corporation

Senior CPU RTL Design Engineer

Intel Corporation · AZ, US

5 days ago

Senior CPU RTL Design Engineer

Intel Corporation · AZ, US

5 days ago
Resume preview

Impress employers and recruiters.
Choose from hundreds of resume examples.

Target Resume Now
Resume preview

Tailor your resume to this Senior CPU RTL Design Engineer role.

Rezi rewrites your resume against Intel Corporation's job description. Free.

Resume score gauge reading 58 out of 100

Don't guess if your resume is good enough.

See how it scores against the Senior CPU RTL Design Engineer posting at Intel Corporation — free, in seconds.

About the Role

As a CPU Logic Design Engineer, you will play a critical role in designing and optimizing the logic for Intel's cutting-edge processors. You will drive the development of register transfer level (RTL) code and simulation for the CPU, enabling creation of cell libraries, functional units, and CPU IP blocks for integration into full-chip designs. Your expertise will be pivotal in defining architecture and microarchitecture features, ensuring Intel continues to deliver innovative solutions that lead the industry in performance, energy efficiency, and design integrity. By contributing to the development and optimization of logic structures, you will help create technology that enriches the lives of every person on Earth, while enabling Intel to achieve its broader mission of engineering a brighter future.

Responsibilities

  • Develop and optimize logic design, register transfer level (RTL) coding, and simulation for the CPU.
  • Participate in defining the architecture and microarchitecture features of the CPU design.
  • Write RTL and optimize logic for power, performance, area, and timing goals.
  • Ensure design integrity for physical implementation through effective strategies, tools, and methods.
  • Review verification plans to ensure design features are correctly validated and resolve failing RTL tests.
  • Document microarchitectural specifications (MAS) for the CPU features.
  • Collaborate with SoC customers to ensure seamless integration and high-quality performance of the CPU block.

Requirements

  • Strong ownership of complex technical deliverables and a commitment to delivering results.
  • Strong problem-solving and analytical skills with a data-driven approach.
  • Excellent collaboration skills across architecture, design, verification, and integration teams.
  • Bachelor's degree in electrical engineering, computer engineering, or computer science with 5+ years of relevant experience. Or a Master's degree in the same filed with 3+ years of experience.
  • 5+ years experience in CPU RTL design using System Verilog, with strong knowledge of logic design, simulation, and debug.
  • 3+ years experience with modern energy-efficient and low-power logic design methods, including techniques applicable to high-frequency optimization.
  • 3+ years experience in Cross-clock domain crossings and power aware design.
  • 3+ years experience in scripting languages such as TCL, Perl, or Python.
  • Knowledge on CPU power-management namely power/electrical budgeting, dynamic voltage and frequency scaling, thermal, P/C states and reset sequence handling.
  • Comprehensive knowledge of Intel Architecture ISA and system architecture, including x86 assembly language.
  • Experience with high-speed circuit design and optimization, specifically for datapath, circuits, and arrays.
  • Familiarity with circuit planning and timing convergence processes.
  • Ability to leverage broad understanding of CPU architecture to deliver impactful solutions.
  • Proficient with static timing analysis, UPF and lint checks.

Skills

  • CPU RTL design
  • System Verilog
  • Logic design
  • Simulation
  • Debug
  • Energy-efficient and low-power logic design
  • High-frequency optimization
  • Cross-clock domain crossings
  • Power aware design
  • Scripting languages (TCL, Perl, Python)
  • CPU power-management
  • Intel Architecture ISA
  • System architecture
  • x86 assembly language
  • High-speed circuit design
  • Circuit planning
  • Timing convergence
  • Static timing analysis
  • UPF
  • Lint checks

Location

  • US, Texas, Austin
  • US, Arizona, Phoenix

Work Type

  • Hybrid
  • Experienced Hire
  • Shift 1

Experience Level

  • 5+ years of relevant experience
  • 3+ years of experience

Education Level

  • Bachelor's degree in electrical engineering, computer engineering, or computer science
  • Master's degree

Salary/Compensations

  • $141,910.00 - $269,100.00 USD

Benefits

  • Competitive pay
  • Stock bonuses
  • Health benefits
  • Retirement benefits
  • Vacation benefits

About the Company

  • Intel invests in our people and offers a complete and competitive package of benefits employees and their families through every stage of life.
  • At Intel, you'll help design the CPUs that power some of the world's most advanced computing platforms. As part of our CPU Design team, you'll work alongside industry-leading engineers and architects to solve complex technical challenges, influence next-generation processor innovations, and deliver technologies that impact millions of users worldwide. This role offers the opportunity to take ownership of critical RTL and microarchitecture development, collaborate across the full product lifecycle, and see your contributions come to life in industry-leading products.
  • Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Equal Opportunity

  • All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.