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About the Role
Execute and own assigned design verification activities that support first-pass silicon success and confirm compliance with performance, power, and schedule requirements. Own or contribute to analog and mixed-signal verification of integrated circuits or subsystems. Collaborate with AMS DV team members and local contract DV resources on assigned verification activities. Contribute to verification strategies for mixed-signal IPs and implement verification IP using object-oriented programming principles and methodologies, including UVM. Verification planning, maintenance, feature extraction, verification tests, coverage and checker development. Develop efficient, reusable state-of-the-art verification environments and testbench structures. Participate in technical reviews with analog and digital design, systems, test, validation, and verification teams. Able to debug the RTL for design intent and interface with cross-functional teams and collaboration in all verification related activities. Provide technical guidance and support to verification team members within assigned areas of expertise.
Responsibilities
- Execute and own assigned design verification activities
- Own or contribute to analog and mixed-signal verification of integrated circuits or subsystems
- Collaborate with AMS DV team members and local contract DV resources
- Contribute to verification strategies for mixed-signal IPs
- Implement verification IP using object-oriented programming principles and methodologies, including UVM
- Perform verification planning, maintenance, feature extraction, verification tests, coverage and checker development
- Develop efficient, reusable state-of-the-art verification environments and testbench structures
- Participate in technical reviews with analog and digital design, systems, test, validation, and verification teams
- Debug RTL for design intent
- Interface with cross-functional teams and collaborate in all verification related activities
- Provide technical guidance and support to verification team members
Requirements
- Experience of 5+ years in advanced verification methodologies, owning the verification of complex digital and mixed signal designs
- Strong fundamentals in analog and mixed signal circuit concepts and topologies
- Experience working with mixed signal verification environment, simulation, and regression tools such as Cadence Virutuoso, xCelium, Incisive, vManager, IMC
- Ability to read analog schematics and extract related main functionality
- Familiar with Verilog based RTL coding and ASIC design methodology
- Strong proficiency in SystemVerilog and advanced verification methodologies, including assertions, constrained randomization, metric-driven verification, and UVM
- Familiar with behavioral modeling of analog blocks using System Verilog (RNM) and VerilogAMS
- Experience in modelling mixed signal blocks including biasing networks, power regulators, bandgaps, simple amplifiers, comparators, data converters, mixers, multiplexers, switches, power converters, etc.
- Experience modelling power converters is desired
- Good knowledge of UNIX shell scripting, Perl and TCL scripting
- Proven experience in writing verification plans and test bench development, simulation and debugging
- Concise and proactive communication skills within a multi-site and multi-cultural environment
- Ability to communicate technical recommendations clearly and build alignment based on technical facts
- Ability to support technical discussions with internal stakeholders, customers, or partners when required
- Takes responsibility for solutions and makes them happen, self-motivated
- Looks for continuous improvement in own and Renesas work practices
- Good analytical and problem-solving skills
- Results-oriented and able to deliver on-time under tight schedule pressure
- Ability to propose innovative solutions
- Cross cultural awareness and sensitivity
Skills
- Advanced verification methodologies
- Analog and mixed-signal verification
- Object-oriented programming
- UVM
- Verification planning
- Test development
- Coverage development
- Checker development
- Testbench development
- RTL debugging
- SystemVerilog
- Assertions
- Constrained randomization
- Metric-driven verification
- Behavioral modeling of analog blocks
- UNIX shell scripting
- Perl scripting
- TCL scripting
- Communication skills
- Analytical skills
- Problem-solving skills
Location
- Remote Work Available: No
Work Type
- Employment Type: Regular (PERM)
Experience Level
- 5+ years
Education Level
- Degree level qualification in electrical engineering, electronics, computer engineering, computer science, or equivalent
Benefits
- Competitive compensation
- Comprehensive benefits package
About the Company
- Renesas is a global company providing embedded semiconductor solutions with the purpose of 'To Make Our Lives Easier'. With over 21,000 engineers and problem-solving professionals working in more than 30 countries, we are involved in developing world-leading technology in the automotive, industrial, infrastructure, and IoT fields, contributing to the realization of a safer, healthier, more environmentally friendly, and smarter future.
- At Renesas, 'TAGIE (Transparent, Agile, Global, Innovative, Entrepreneurial)' is at the core of our corporate culture. TAGIE is a common set of values that supports how we work, how we grow, and our efforts to achieve our Purpose. This collaborative spirit and challenging mindset enable us to transform industries through semiconductor technology and contribute to people's lives around the world.
- We offer a competitive compensation system and a comprehensive benefits package. Details of the benefits will be provided during the selection process.
- We invite you to join our challenge to create the future with us. We look forward to your applications.