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About the Role
We are seeking experienced Timing Design Engineers and Test Design Engineers to lead backend development and drive improvements in quality, performance, and cost competitiveness. You will join a global team across Japan, China, Germany, Vietnam, and India, utilizing cutting-edge EDA and AI design technologies to contribute to the development of next-generation semiconductor products.
Responsibilities
- Timing design (STA) tasks (Tempus/PrimeTime)
- Test design (DFT) tasks (Tessent/Modus)
Requirements
- Knowledge and experience in either timing design or test design
Skills
- LSI timing design
- LSI test design
- EDA tool experience (Cadence, Synopsys, Siemens, etc.)
Location
- Japan
Work Type
- Full-time
- Onsite
Experience Level
- Experienced
Benefits
- Competitive compensation package
- Comprehensive benefits package
About the Company
- Renesas is a global company providing embedded semiconductor solutions, aiming to 'Make Our Lives Easier'. With over 21,000 engineers and problem solvers in more than 30 countries, we contribute to developing world-leading technologies in automotive, industrial, infrastructure, and IoT fields, fostering a safer, healthier, environmentally friendly, and smarter future.
- Our corporate culture, TAGIE (Transparent, Agile, Global, Innovative, Entrepreneurial), is central to how we work, grow, and achieve our Purpose. This collaborative spirit and challenging mindset enable us to transform industries through semiconductor technology and contribute to people's lives worldwide.