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About the Role
We are seeking a PHY/SERDES Lead to spearhead the development of our semi-custom optical PHY layer.
Responsibilities
- Own and lead the development of our semi-custom optical PHY layer.
- Define and architect the end-to-end link.
- Bring up PHYs.
- Integrate PHYs into the system level.
- Customize PHYs.
Requirements
- Multiple successful tapeouts of SERDES or PHY macros.
- Deep understanding of tradeoffs between XSR/VSR/LR class SERDES and different operating regimes and challenges.
- Understanding and ownership of end-to-end link definition and architecture.
- Experience with bringup of PHYs.
- Understanding of the integration of PHYs into the system level.
Skills
- Chiplet interfaces (UCIe or BoW)
- Optical interconnect PHY layers
- Re-driven and re-timed PHY interfaces