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About the Role
We are seeking SoC architects to take ownership of the detailed SoC-level architecture for dies on the A-0 and A-1 wafer-scale systems. You will collaborate with architecture and ASIC design teams to develop implementable specifications and oversee their execution.
Responsibilities
- Own the detailed SoC-level architecture of dies on the A-0 and A-1 wafer-scale systems.
- Work with architecture and ASIC design teams to create implementable specs.
- Drive the execution of implementations.
Requirements
- Full ownership of specs and drove implementation for at least one SoC/die.
- Deep understanding of architecture, microarchitecture, and physical design processes.
- Ability to coordinate with various groups to drive SoC implementation.
- Understanding of SoC interactions with packages, memory subsystems, and IO.
- Ability to work with teams responsible for interacting blocks.
Skills
- SoC architecture
- Microarchitecture
- Physical design
- Multi-die/multi-chiplet/MCM designs
- Reticle-max/large-die SoC architecture
- PPA improvement
- High-speed silicon delivery