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About the Role
We're seeking an experienced and results-oriented Design Verification Engineer to join our dynamic ASIC IP organization. You'll have a unique opportunity to demonstrate your expertise across multiple verification domains while contributing to mission-critical 5G technology.
Responsibilities
- Lead block-level and top-level ASIC and IP verification efforts
- Architect and develop comprehensive RTL testbenches from scratch
- Conduct hands-on verification utilizing SystemVerilog and UVM methodologies
- Develop behavioral models using TLM (Transaction-Level Modeling)
- Participate in hardware emulation and hardware acceleration verification
- Drive SW-driven verification initiatives
- Mentor team members and contribute to technical leadership
- Participate in defining verification strategies and best practices
Requirements
- 10+ years of hands-on experience debugging RTL at block and/or top level
- Proven experience in IP, ASIC, SoC, or FPGA RTL verification
- Strong proficiency in SystemVerilog/UVM testbench development
- Demonstrated ability to architect RTL testbenches from scratch
- Knowledge of at least one technology domain: SerDes, PCIe, ARM subsystems, DSPs/accelerators, or Ethernet
- Proficiency in scripting languages (TCL, Python, Perl, or similar)
- Excellent written and verbal communication skills
- BS/MS in Electrical Engineering, Computer Science, or related field
Skills
- SystemVerilog
- UVM
- TLM
- TCL
- Python
- Perl
- SerDes
- PCIe
- ARM
- DSPs
- Ethernet
Location
- Austin, Texas
Work Type
- On-site
- Hybrid
Experience Level
- 10+ years
Education Level
- BS/MS in Electrical Engineering, Computer Science, or related field
Salary/Compensations
- The salary range for this position is dependent on various factors including, but not limited to, location, and the candidate’s combination of job-related knowledge, qualifications, skills, education, training, and experience
- Your pay also includes the opportunity for an annual bonus
Benefits
- Choice of three medical plan options
- Dental plan option
- Company credits towards medical and dental premiums
- 401(k) Plan with automatic 3% company contribution
- Ericsson match $1 for $1 on the first 3% of eligible pay, plus 50 cents on every $1 on the next 2% of eligible pay
- Company credits for basic life insurance and basic accidental death and dismemberment coverage
- Company credits for short-term and long-term disability coverage
- Option to participate in Ericsson’s Stock Purchase Plan
- 15 days of accrued vacation
- Up to 3 personal days per year
- 11 annual holidays
- 8 hours of volunteer time
- 80 hours of sick time annually
- Up to 16 weeks of paid maternity leave
- 6 weeks of parental or adoption leave at 100% of pay
- Financial wellness programs
- Educational assistance
- Matching gifts
- Recognition programs
About the Company
- Ericsson's ASIC IP organization is a growing, world-class semiconductor development center dedicated to driving excellence in 5G network products.
- Our ASICs are the backbone of 5G networks.
- IP teams develop, test, and deliver various functional RTL blocks for integration into these ASICs, supporting Ericsson's mission to build the future of connectivity.
Equal Opportunity
- Ericsson uses a merit-based hiring approach that values people with different experiences, perspectives and skillsets.
- We encourage people from all backgrounds to apply and realize their full potential as part of our Ericsson team.
- Ericsson is proud to be an Equal Opportunity employer