Ph.D. Intern - AI/ML & Design Automation at Marvell Technology | AZ, US | Rezi

Ph.D. Intern - AI/ML & Design Automation at Marvell Technology

Ph.D. Intern - AI/ML & Design Automation

Marvell Technology · AZ, US

1 weeks ago

Ph.D. Intern - AI/ML & Design Automation

Marvell Technology · AZ, US

13 days ago
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About the Role

Marvell is seeking Ph.D. interns to work on cutting-edge AI and machine learning applications within semiconductor design and enterprise infrastructure. This program offers a unique opportunity to apply academic research to real-world problems at production scale, contributing to the development of silicon that powers AI and data infrastructure.

Responsibilities

  • Develop and apply ML models, including graph neural networks, reinforcement learning, and generative approaches, to chip design tasks such as placement, routing, timing closure, power estimation, and design rule checking.
  • Work directly with production EDA tool flows and real design data from active tapeouts in 3nm and 2nm FinFET and Gate-All-Around processes.
  • Build predictive models that reduce design iteration cycles and improve first-pass silicon success rates.
  • Collaborate with analog, digital, and physical design engineers to identify high-value automation targets and validate model outputs against ground-truth silicon results.
  • Present research findings and model performance to engineering leadership and contribute to internal technical documentation.
  • Design, implement, and evaluate LLM-based tools and agentic workflows for use by Marvell's global engineering and operations teams.
  • Build retrieval-augmented generation (RAG) pipelines, fine-tuning workflows, and prompt engineering frameworks grounded in Marvell's internal knowledge and tooling ecosystem.
  • Evaluate model performance, safety, and reliability in production enterprise environments and iterate based on real user feedback from engineering teams.
  • Collaborate with IT, security, and engineering stakeholders to ensure responsible and scalable AI deployment across the organization.
  • Present implementation results and adoption metrics to cross-functional leadership.

Requirements

  • Currently enrolled in a Ph.D. program in Computer Science, Electrical Engineering, Data Science, or a related field, with a research focus in machine learning, AI systems, or a related area.
  • Demonstrate applied experience training, evaluating, and deploying ML models using frameworks such as PyTorch or TensorFlow.
  • Write production-quality Python; familiarity with version control (Git) and software development best practices is required.
  • Apply rigorous experimental methodology — design experiments, measure results, and draw defensible conclusions from data.
  • Communicate technical work clearly to both research and engineering audiences.
  • Coursework or research experience in VLSI design, digital or analog circuit design, computer architecture, or EDA.
  • Familiarity with graph-based ML methods (GNNs), reinforcement learning, or generative models applied to structured engineering data.
  • Design and implement agentic GenAI systems with demonstrated experience across the full stack — LLMs, multimodal models, RAG pipelines, and agentic protocols.
  • Apply hands-on knowledge of SOTA architectures and frameworks including transformers, diffusion models, and orchestration tools.
  • Benchmark and evaluate model performance rigorously.
  • Demonstrated ability to independently research and implement concepts from current AI literature and apply them in a working system.
  • Must be eligible to access export-controlled information as defined under applicable law.
  • Candidates are not permitted to use AI tools during interviews.

Skills

  • Machine learning
  • AI systems
  • PyTorch
  • TensorFlow
  • Python
  • Git
  • Graph neural networks
  • Reinforcement learning
  • Generative models
  • VLSI design
  • Digital circuit design
  • Analog circuit design
  • Computer architecture
  • EDA
  • Large language models (LLMs)
  • Agentic AI systems
  • Retrieval-augmented generation (RAG)
  • Prompt engineering
  • Transformers
  • Diffusion models
  • LangChain
  • LangGraph
  • AutoGen
  • CrewAI
  • LlamaIndex
  • Hugging Face
  • Multi-agent orchestration frameworks
  • n8n

Location

  • Remote

Work Type

  • Internship
  • Full-time

Experience Level

  • Ph.D. Intern

Education Level

  • Ph.D.

Salary/Compensations

  • $37 - $73 per hour

Benefits

  • Medical coverage
  • Dental coverage
  • Vision coverage
  • Perks and discounts
  • Robust mental health resources
  • Paid holidays

About the Company

  • Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world.
  • Across enterprise, cloud and AI, and carrier architectures, Marvell's innovative technology is enabling new possibilities.
  • Marvell is building the silicon that makes AI possible — the custom XPUs, the 224G and 448G SerDes, the Silicon Photonics interconnects, the co-packaged optics platforms that hyperscalers depend on to train and deploy the world's most advanced models.
  • Marvell's AI and machine learning teams are working on applying AI to accelerate how silicon is designed, verified, and deployed, and building the enterprise AI infrastructure that makes Marvell's engineering organization faster and smarter at every level.
  • The Ph.D. Intern Program places doctoral candidates directly inside these active efforts, working on problems that are inseparable from their academic research.
  • The work done here is the applied dimension of doctoral research in machine learning, computer science, and electrical engineering — conducted at production scale, on real design data, with real consequences for the silicon that ships to the world's largest AI infrastructure operators.

Equal Opportunity

  • All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
  • Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.