Impress employers and recruiters.
Choose from hundreds of resume examples.
Impress employers and recruiters.
Choose from hundreds of resume examples.
Tailor your resume to this Senior Serdes System Design Engineer/Architect role.
Rezi rewrites your resume against Broadcom's job description. Free.
Tailor your resume to this Senior Serdes System Design Engineer/Architect role.
Rezi rewrites your resume against Broadcom's job description. Free.
Don't guess if your resume is good enough.
See how it scores against the Senior Serdes System Design Engineer/Architect posting at Broadcom — free, in seconds.
Don't guess if your resume is good enough.
See how it scores against the Senior Serdes System Design Engineer/Architect posting at Broadcom — free, in seconds.
About the Role
This is a DSP/Systems Design Engineering position focused on high-speed Serdes products within the Physical Layer Products (PLP) Division. You will join a team designing, verifying, and implementing advanced signal processing algorithms for the physical layer of high-speed Serdes operating at speeds of 100G+.
Responsibilities
- Develop channel models and run simulations to help define Serdes architecture
- Define and document signal processing block requirements, architecture, and lab test plan
- Develop bit-exact MATLAB and C/C++ system models for simulation and verification
- Develop and run system-level simulation suites of the Serdes to evaluate architectural tradeoffs
- Work with the design team to perform vector matching verification with RTL simulations
- Develop, test, and debug firmware associated with physical layer functionality
- Lab testing and debug of Serdes
- Documentation/application note development and customer support
- Support marketing group with customer meetings and collateral
Requirements
- B.S.E.E. plus 8+ years relevant experience OR M.S.E.E. plus 6 years required
- Expert knowledge in Communication Theory
- Expert knowledge in Digital Signal Processing algorithms
- Working knowledge of Analog circuit behavior
- Working knowledge of Transmission line theory and s-parameter
- Expert in MATLAB, C/C++ programming
- Good hands-on skills in the lab
- Experience in designing high-speed Clock and Data Recovery (CDR) PLLs is a very big plus
- Experience in equalization techniques for wireline communication applications such as read-channel is also a very big plus
- RTL coding is a plus
- Knowledge of IEEE 802.3/OIF 100G/200G/400G Serdes standards and PCIe Gen6/Gen7 standards is a plus
Skills
- Communication Theory
- Digital Signal Processing algorithms
- Analog circuit behavior
- Transmission line theory
- s-parameter
- MATLAB
- C/C++ programming
- Lab testing
- Clock and Data Recovery (CDR) PLLs
- Equalization techniques
- RTL coding
- IEEE 802.3/OIF 100G/200G/400G Serdes standards
- PCIe Gen6/Gen7 standards
Experience Level
- 8+ years relevant experience (with B.S.E.E.)
- 6+ years relevant experience (with M.S.E.E.)
Education Level
- B.S.E.E.
- M.S.E.E.
Salary/Compensations
- USD 121,900.00 To USD 195,000.00
Benefits
- Discretionary annual bonus
- Competitive new hire equity grant
- Annual equity awards
- Medical plans
- Dental plans
- Vision plans
- 401(K) participation with company matching
- Employee Stock Purchase Program (ESPP)
- Employee Assistance Program (EAP)
- Company paid holidays
- Paid sick leave
- Vacation time
- Paid Family Leave
- Other leaves of absence
About the Company
- Broadcom is proud to be an equal opportunity employer.
Equal Opportunity
- We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.
- We will also consider qualified applicants with arrest and conviction records consistent with local law.