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About the Role

Seeking a senior engineer and technical leader with deep expertise in hardware and CAD flow development to own and drive Apple's AMS (Analog/Mixed-Signal) simulation methodology. You will architect, lead, and continuously evolve the AMS simulation methodology and tooling strategy for analog, RF, interconnect, PMIC, and memory design teams. Your leadership will directly shape customer experiences through the delivery of state-of-the-art processors.

Responsibilities

Architect, develop, maintain, and enhance AMS (Analog/Mixed-Signal) simulation methodology and solutions for analog, RF, and mixed-signal designs.
Provide flows/methodologies for different tool sets across various technology nodes.
Collaborate closely with design teams.
Drive and coordinate efforts to develop and validate AMS/co-simulation flows.
Ensure ease of use, speed up design validation, and guarantee functional silicon.
Mentor engineers, influence technical direction, and lead small development teams to deliver novel and complex CAD solutions.
Define how design engineers interact with and leverage mixed-signal simulations and design verification workflows.
Lead the application of LLMs/AI agents to CAD software development, test generation, debugging, and team-wide efficiency improvements.
Lead small software development teams to design and deliver novel, complex CAD applications.

Requirements

Bachelor's degree in Computer Science, Electrical Engineering, Computer Engineering, or related field.
10+ years of relevant AMS (Analog Mixed-Signal) industry experience.
Strong proficiency in Python, Perl, C/C++, or TCL programming.
Deep, hands-on experience with mixed-signal co-simulation tools and methodologies.
Expert-level experience with mixed-signal simulation implementation including discipline resolution, binding, IE setup, Connect Modules, AMSD blocks, wreal, TCL probes, real number modeling, UDNs, etc.
Proficiency with behavioral and functional circuit description languages including SystemVerilog, VerilogA, Verilog, Verilog-AMS, VHDL.
Strong understanding of custom IC designs and transistor description formats (SPICE, DSPF, schematics).
Advanced skills in object-oriented programming, data structures, algorithms, system architecture, command-line and GUI interaction, testing/coverage, and revision control.
Deep expertise in Virtuoso Schematic Editor, PDK content, CDF properties, hierarchy editor, SKILL code, netlisting, and Analog Design Environment (ADE).
Exceptional communication and presentation skills with a demonstrated ability to influence technical direction at senior and executive levels.
Proven track record of driving quality and productivity improvements at an organizational level.

Skills

AMS (Analog/Mixed-Signal) simulation methodology
Hardware and CAD flow development
Circuit analysis
Pre and post-layout simulation
RTL simulation
Behavioral modeling
Analog+digital co-simulation
Logic equivalency checks
Signoff
Design verification workflows
Python
Perl
C/C++
TCL
Mixed-signal co-simulation tools
Cadence (Xcelium, Verisium/Indago, SimVision, AMS Designer)
Synopsys (VCS, Verdi)
Siemens (Questa, Symphony)
Cadence Spectre
Synopsys PrimeSim/HSPICE/Finesim
Siemens AFS
SystemVerilog
VerilogA
Verilog
Verilog-AMS
VHDL
LLMs/AI agents
Object-oriented programming
Data structures
Algorithms
System architecture
Command-line interaction
GUI interaction
Testing/coverage
Revision control
Virtuoso Schematic Editor
PDK content
CDF properties
Hierarchy editor
SKILL code
Netlisting
Analog Design Environment (ADE)

Experience Level

Senior engineer
10+ years of relevant AMS (Analog Mixed-Signal) industry experience

Education Level

Bachelor's degree in Computer Science, Electrical Engineering, Computer Engineering, or related field

About the Company

Apple is seeking to help shape the future generations of processors that will enable the next remarkable Apple innovation.
The team is looking for a senior engineer and technical leader with deep expertise in hardware and CAD flow development.