Impress employers and recruiters.
Choose from hundreds of resume examples.

Impress employers and recruiters.
Choose from hundreds of resume examples.

Target Resume Now

About the Role

We are seeking an Applications Engineer to act as a technical liaison between customers and our internal teams. This role involves guiding customers through the evaluation, integration, and verification of our silicon IP, ensuring successful implementation in their SoCs and keeping tapeouts on schedule.

Responsibilities

• Serve as the primary technical point of contact for customers integrating silicon IP, from RTL simulation and UVM testbench setup through synthesis, floorplanning, place-and-route, timing closure, and signoff.
• Debug customer-reported issues across RTL, testbench, constraints, and physical implementation boundaries, distinguishing IP defects from configuration or integration issues.
• Develop and maintain reference verification environments, example testbenches, implementation flows, floorplan guidance, and integration collateral to reduce customer ramp time.
• Deliver onsite and remote technical training on IP architecture, verification methodology, IP usage, coverage closure, timing models, physical abstracts, and implementation best practices.
• Partner with engineering and product leaders to aggregate field evidence, prioritize corrective work, and shape future capabilities and deliverables.
• Support pre-sales technical evaluations by assessing IP quality, verification collateral, PPA, floorplan compatibility, node/process readiness, and integration effort.
• Lead architecture-to-signoff reviews of customer integrations, identifying implementation risks and recommending corrective actions.
• Exercise upcoming IP releases and customer collateral in representative integration flows, documenting gaps for engineering owners.
• Advise customers on interface and protocol integration, multi-voltage and power-domain design, DFT stitching, and node-specific signoff requirements.
• Turn recurring support cases into reusable enablement, including reference examples, diagnostic playbooks, automation, and self-service guidance.
• Track and report field issues and recurring integration patterns to inform the IP roadmap, deliverable quality, and process-node support priorities.

Requirements

• BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• 5+ years of experience in ASIC/SoC verification, physical design, silicon IP integration, or a closely related applications engineering role.
• Strong scripting and automation skills (Python, TCL, Make, or shell) for building flows, regressions, and debug tooling.
• Hands-on experience integrating third-party or internally licensed silicon IP (e.g., soft/hard macros, protocol/interface IP, interconnect, standard-cell libraries, memory compilers).
• Experience diagnosing complex integration issues and translating technical findings into clear, actionable guidance.
• Familiarity with multiple foundries or process nodes and their associated verification, PPA, reliability, and signoff challenges.
• Strong SystemVerilog/UVM skills, comfort reading and debugging RTL, and experience with coverage-driven verification using simulators (Xcelium, VCS, or Questa).
• Practical experience with synthesis, floorplanning, place-and-route, and static timing analysis using tools such as Cadence Innovus, Synopsys ICC2/Fusion Compiler, PrimeTime, or Tempus.
• Working knowledge of timing models and physical abstracts (Liberty/ECSM/CCS and LEF), constraints and low-power intent (SDC and UPF), and signoff flows (STA, IR/EM, DRC/LVS).
• Willingness to travel to customer sites approximately 20–30%.

Skills

• Python
• TCL
• Make
• Shell scripting
• ASIC/SoC verification
• Physical design
• Silicon IP integration
• Applications engineering
• SystemVerilog
• UVM
• RTL debugging
• Coverage-driven verification
• Xcelium
• VCS
• Questa
• Synthesis
• Floorplanning
• Place-and-route
• Static timing analysis
• Cadence Innovus
• Synopsys ICC2/Fusion Compiler
• PrimeTime
• Tempus
• Liberty
• ECSM
• CCS
• LEF
• SDC
• UPF
• STA
• IR/EM analysis
• DRC
• LVS

Work Type

• Onsite
• Remote

Experience Level

• 5+ years of experience

Education Level

• BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or a related field.

Salary/Compensations

• $160,000 to $210,000

Benefits

• Meaningful equity
• Comprehensive benefits
• 401K match
• Company-paid benefits
• Equity program
• Paid parental leave
• Flexibility

About the Company

• Efficient is developing the world’s most energy-efficient general-purpose computer processor.
• Efficient’s patented technology uses 100x less energy than state of the art commercially available ultra-low-power processors and is programmable using standard high-level programming languages and AI/ML frameworks.
• This level of efficiency makes perpetual, pervasive intelligence possible: run AI/ML continuously on a AA battery for 5-10 years.
• Our platform’s unprecedented level of efficiency enables IoT devices to intelligently capture and curate first-party data to drive the next major computing revolution.