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About the Role

The Texas Institute for Electronics (TIE) is seeking motivated individuals to advance the state-of-the-art in critical semiconductor domains such as advanced packaging, and to help restore U.S. leadership in semiconductor manufacturing. We are developing cutting-edge semiconductor manufacturing equipment and processes that will define future roadmaps of semiconductor logic, memory, heterogenous integration, chip cooling, etc. This role will implement automation and workflows for custom integrated circuit design and 3DHI modeling across a wide range of EDA IC design tools.

Responsibilities

Create and maintain scripts/automation to assure compatibility and integration with wide range of EDA IC design/modeling tools to enable simulation/emulation, physical verification, parasitic extraction, and 3DHI modeling.
Help develop, deploy, and maintain TIE's ADK (Assembly Design Kits).
Maintain interoperability and compatibility of TIE’s design kits with our partner PDK’s, our internal PDK’s & ADK’s, and vendor EDA tool revisions.
Develop innovative physical design place & route methodology and flow solutions to meet current and future design challenges.
Help establish and validate physical design methodologies, flow automation and infrastructure for our internal 3D heterogenous micro-system modeling teams.
Automation of Test structure layouts to help drive next generation processing capabilities across a wide range of materials.
Support TIE's standard cell offerings and drive validation/simulation/emulation capability around those standard cells.
Facilitate and oversee project tapeouts.
Provide technical leadership, mentoring, and customer support for our internal design and 3D modeling teams.

Requirements

Bachelor’s degree in Electrical Engineering, Computer Science or closely related field.
Minimum of three years industry experience (for Engineer II).
Minimum of ten years industry experience (for Senior Engineer).
Experience in developing and customizing high performance semiconductor IC design, layout, & validation flows using industry-standard EDA tools (Cadence, Synopsys, Ansys, Siemens…)
Excellent UNIX and scripting programming skills (Perl, Python, TCL or similar languages).
Experience with software build automation and version control software.
Proficiency in both Linux and Windows environments.
Prior CAD support experience in semiconductor IC design, including oversight of product tapeouts.
Strong teamwork, collaboration, and communication abilities, with the ability to contribute to company-wide consensus on design flows, tools, and methodologies.
Ability to thrive in a fast-paced environment and manage multiple projects simultaneously.
Relevant education and/or industry experience may be substituted as appropriate.
Master’s or advanced degree in semiconductor engineering fields such as Electrical Engineering, Computer Science, or other relevant disciplines (Preferred).
Previous experience in setting up and facilitating Design environments and maintaining design kit operability and coordination for cross functional design, modeling, and/or layout teams (Preferred).
Previous experience integrating PDK and/or ADK's to enable 2.5D or 3D SoC's (Preferred).
Experience evaluating EDA tool capabilities driving EDA vendors to make tool improvements or enable new functions to meet advanced or unique design requirements (Preferred).
Experience in a startup or research and development (R&D) environment (Preferred).
Applicants must be authorized to work in the United States on a full-time basis for any employer without sponsorship.
Resume/CV required.
3 work references with their contact information; at least one reference should be from a supervisor required.
Letter of interest required.

Skills

EDA IC design tools
Automation scripts
Linux environments
Windows applications
Assembly Design Kits (ADK's)
Partner PDK's
Semiconductor 3DHI packaging/manufacturing
Simulation/emulation
Physical verification
Parasitic extraction
3DHI modeling
Physical design place & route methodology
Test structure layouts
Standard cell offerings
Project tapeouts
Software build automation
Version control software
UNIX
Perl
Python
TCL

Location

PICKLE RESEARCH CAMPUS

Work Type

On-site
Full-time

Experience Level

Entry Level (CAD/EDA Engineer I)
Mid-Level (CAD/EDA Engineer II - Minimum 3 years)
Senior Level (Senior CAD/EDA Engineer - Minimum 10 years)

Education Level

Bachelor’s degree in Electrical Engineering, Computer Science or closely related field
Master’s or advanced degree in semiconductor engineering fields such as Electrical Engineering, Computer Science, or other relevant disciplines (Preferred)

Salary/Compensations

Industry Competitive Salaries

Benefits

Competitive health benefits (employee premiums covered at 100%, family premiums at 50%)
Voluntary Vision, Dental, Life, and Disability insurance options
Generous paid vacation, sick time, and holidays
Teachers Retirement System of Texas, a defined benefit retirement plan, with 7.75% employer matching funds
Additional Voluntary Retirement Programs: Tax Sheltered Annuity 403(b) and a Deferred Compensation program 457(b)
Flexible spending account options for medical and childcare expenses
Robust free training access through LinkedIn Learning plus professional conference opportunities
Tuition assistance
Expansive employee discount program including athletic tickets
Free access to UT Austin's libraries and museums with staff ID card
Free rides on all UT Shuttle and Austin CapMetro buses with staff ID card
Relocation assistance may be available

About the Company

The Texas Institute for Electronics (TIE) is a public-private partnership of preeminent semiconductor systems and defense electronics companies, national labs, and academic institutions.
TIE's mission is to advance the state-of-the-art in critical semiconductor domains such as advanced packaging, and in the process to help restore U.S. leadership in semiconductor manufacturing.
TIE is developing cutting-edge semiconductor manufacturing equipment and processes that will define future roadmaps of semiconductor logic, memory, heterogenous integration, chip cooling, etc.
TIE is part of the Cockrell School of Engineering at The University of Texas at Austin (UT Austin), a global leader in technology innovation and engineering education for over a century.
UT Austin's Cockrell School of Engineering has 11 undergraduate and 13 graduate programs, over 20 research centers and a faculty community that boasts one of the highest number of National Academy of Engineering members among U.S. universities.
Texas Engineering has launched some of the nation’s most accomplished leaders and pioneered world-changing solutions in virtually every industry, from space exploration to energy to health care.
The Cockrell School embodies Austin’s innovative spirit, a city named “America’s Coolest City” by Expedia and “The Best Place to Live in the U.S.” by U.S. News and World Report.
Major companies with Austin campuses, such as Dell, National Instruments, Apple, IBM, Samsung, Google, Tesla, and many others, continue to recruit Cockrell School students at a remarkable rate.
At UT Austin, the motto is “What starts here changes the world.”
UT Austin is internationally recognized for its academic programs and research.
UT Austin is recognized by Forbes as one of America’s Best Large Employers.

Equal Opportunity

The University of Texas at Austin, as an equal opportunity/affirmative action employer, complies with all applicable federal and state laws regarding nondiscrimination and affirmative action.
The University is committed to a policy of equal opportunity for all persons and does not discriminate on the basis of race, color, national origin, age, marital status, sex, sexual orientation, gender identity, gender expression, disability, religion, or veteran status in employment, educational programs and activities, and admissions.