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About the Role

The technical leader will be responsible for System and Silicon validation of AMD EPYC Server & AMD Instinct products. The successful candidate will work as part of the post-silicon validation group, facilitating all aspects of validation and debug for system level failures working with engineering teams across AMD. Candidate will be immersed in challenging system debug work as well as developing & executing validation strategy for optimal debug throughput on current product to meet milestones at POR quality. The system debug lead will also help in driving improvements to future debug methodology. The candidate should be able to work in a global environment while maintaining a synergetic culture.

Responsibilities

Lead system-level, rack-level, and cluster-scale validation strategy for AI and machine learning server platforms.
Define and drive comprehensive validation plans covering customer deployment scenarios across scale-up and scale-out environments.
Develop validation methodologies and test strategies spanning CPU, GPU, memory, BIOS, BMC, networking, storage, platform firmware, operating systems, and infrastructure components.
Collaborate with architecture, hardware, firmware, software, and platform engineering teams to define validation requirements, identify coverage gaps, and improve overall product quality.
Lead investigation and root cause analysis of complex hardware, firmware, software, networking, and system integration issues.
Drive technical decision-making within the validation organization and influence cross-functional teams to resolve critical product risks and quality concerns.
Define and enhance scalable validation frameworks, automation infrastructure, telemetry-driven workflows, and data-driven validation methodologies.
Analyze large-scale validation data to identify systemic failures, reliability risks, performance bottlenecks, and product readiness concerns.
Establish validation readiness criteria, quality metrics, and coverage strategies that improve execution efficiency and provide early risk identification.
Mentor and provide technical leadership to engineers, helping improve validation methodologies, automation capabilities, debugging effectiveness, and system-level engineering practices.
Drive execution across multiple validation programs while managing priorities, dependencies, schedules, and technical risks.
Communicate validation status, readiness assessments, quality metrics, technical recommendations, and key risks to senior technical leadership and management.
Support customer-focused validation efforts by ensuring test environments accurately represent real-world deployment conditions and hyperscale operating environments.
Drive continuous improvements in validation processes, tools, and automation to improve organizational efficiency, test coverage, and product quality.

Requirements

Extensive experience in validation roles involving debugging OS, FW, Silicon, and HW issues.
Understanding of industry standard busses and their software stack, such as PCIe, CXL.
Strong knowledge of X86 architecture, SoC design, memory, RAS & power management
Extensive knowledge of system architecture, technical debug, and validation strategy
Good understanding and experience in platform/ system level debug, Operating System, Device Drivers and System BIOS interactions.
Excellent communication and coordination skills.
Detailed oriented, highly organized, able to prioritize, and juggle multiple work streams to tight deadlines.
Strong analytical/problem-solving skills and pronounced attention to details
Experience in technical program management.
A thorough understanding of datacenter industry technologies and their software stack.
Must be a self-starter, and able to independently drive tasks to completion

Skills

System and Silicon validation
Post-silicon validation
System debug
Validation strategy
Debug throughput
AI Rack Validation
Balanced, scalable, and automated solutions
Technical leadership
Validation and debug expertise
Product development
Root cause analysis
Cross-functional collaboration
System Architects
IP design
SoC
FW
SW
Manufacturing
System-level validation
Rack-level validation
Cluster-scale validation
AI server platforms
Machine learning server platforms
Customer deployment scenarios
Scale-up environments
Scale-out environments
Validation methodologies
Test strategies
CPU validation
GPU validation
Memory validation
BIOS validation
BMC validation
Networking validation
Storage validation
Platform firmware validation
Operating systems validation
Infrastructure components validation
Hardware engineering
Firmware engineering
Software engineering
Platform engineering
Validation requirements definition
Coverage gap identification
Product quality improvement
Hardware issue analysis
Firmware issue analysis
Software issue analysis
Networking issue analysis
System integration issue analysis
Technical decision-making
Cross-functional team influence
Product risk resolution
Quality concern resolution
Scalable validation frameworks
Automation infrastructure
Telemetry-driven workflows
Data-driven validation methodologies
Large-scale validation data analysis
Systemic failure identification
Reliability risk identification
Performance bottleneck identification
Product readiness concern identification
Validation readiness criteria
Quality metrics
Coverage strategies
Execution efficiency improvement
Early risk identification
Mentoring engineers
Technical leadership for engineers
Automation capability improvement
Debugging effectiveness improvement
System-level engineering practices
Validation program execution
Priority management
Dependency management
Schedule management
Technical risk management
Validation status communication
Readiness assessment communication
Quality metric communication
Technical recommendation communication
Key risk communication
Customer-focused validation
Test environment representation
Real-world deployment conditions
Hyperscale operating environments
Validation process improvement
Validation tool improvement
Automation improvement
Organizational efficiency improvement
Test coverage improvement
Product quality improvement
OS debugging
FW debugging
Silicon debugging
HW debugging
PCIe
CXL
X86 architecture
SoC design
Memory management
RAS (Reliability, Availability, Serviceability)
Power management
System architecture
Technical debug
Platform debug
System BIOS
Device Drivers
Communication skills
Coordination skills
Attention to detail
Analytical skills
Problem-solving skills
Technical program management
Datacenter industry technologies
Self-starter
Task completion independence

Location

Austin, TX
Secaucus, NJ

Work Type

Full-time

Experience Level

Lead

Education Level

Bachelors or Masters degree in electrical or computer engineering preferred

Benefits

AMD benefits at a glance

About the Company

At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.
Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career.

Equal Opportunity

AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.