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About the Role
Microchip Technology Inc. is seeking an experienced and innovative verification engineer to join our FPGA Business Unit in Chandler, Arizona. This role involves working on the verification of next-generation, highly secure, low-power FPGA device products.
Responsibilities
- Verify complex subsystems and SoC using constrained random, formal, and C-based verification methodologies.
- Develop and maintain reusable UVM-based test benches and verification environments.
- Engage in RTL, power-aware, and gate-level verification.
- Contribute to quality and productivity by using AI/ML-enabled verification methodologies.
- Collaborate with emulation and hardware prototyping teams to define a unified verification methodology.
- Collaborate with architecture and design teams to ensure seamless execution and first-silicon success.
- Mentor junior team members.
Requirements
- 12.5+ years in functional verification of complex SoC designs.
- Expertise in System Verilog, UVM, and formal verification methodologies.
- Proven experience in methodology development and tool automation.
- Familiarity with AI/ML-driven EDA tools and scripting for flow integration.
- Good understanding of SoC architectures (ARM/RISC-V).
- Expertise in at least two of the following domains/peripherals: CPU subsystems, PCIe Gen3/Gen4/Gen5, DDR4/DDR5, LPDDR4X, MIPI DSI/CSI, Ethernet MAC, USB, Security and cryptography IPs.
- Exposure to emulation, hardware prototyping, and post-silicon debug.
- Experience with FPGA-based acceleration platforms and simulation/emulation flows.
- Proficiency in Python, TCL/TK, and C/C++ for automation and validation.
- Familiarity with Siemens/Cadence/Synopsys verification suites.
- Experience with revision control systems (Git, Perforce, svn).
- Excellent debug skills.
- Experience working with global cross-functional teams.
- Excellent communication and collaboration skills.
- Strong understanding of FPGA architecture.
- Experience with coverage-driven verification using ML-based optimizations.
- Knowledge and exposure to complete SOC RTL to GDS to silicon release flow.
Skills
- System Verilog
- UVM
- Formal verification
- Constrained random verification
- C-based verification
- RTL verification
- Power-aware verification
- Gate-level verification
- AI/ML-enabled verification
- Python
- TCL/TK
- C/C++
- SoC architectures
- ARM
- RISC-V
- PCIe Gen3/Gen4/Gen5
- DDR4/DDR5
- LPDDR4X
- MIPI DSI/CSI
- Ethernet MAC
- USB
- Security and cryptography IPs
- Emulation
- Hardware prototyping
- Post-silicon debug
- FPGA-based acceleration platforms
- Simulation flows
- Emulation flows
- Siemens verification suites
- Cadence verification suites
- Synopsys verification suites
- Git
- Perforce
- svn
- Debug skills
- Communication skills
- Collaboration skills
- FPGA architecture
- Coverage-driven verification
- ML-based optimizations
- RTL to GDS flow
- Silicon release flow
Location
- Chandler, Arizona
Work Type
- Full-time
Experience Level
- 12.5+ years
Education Level
- BS or MS in Electrical/Electronic Engineering
Salary/Compensations
- $91,000 - $232,000
Benefits
- Competitive base pay
- Restricted stock units
- Quarterly bonus payments
- Health benefits that begin day one
- Retirement savings plans
- Industry-leading ESPP program with a 2-year look back feature
About the Company
- Microchip Technology Inc. is a global organization with 17,000 members, designing technology that powers the world. We foster an atmosphere of trust, empowerment, respect, diversity, and communication. Our company is built by dedicated team players who challenge the status quo, achieving record revenue and over 30 years of quarterly profitability. We are committed to employee development, values-based decision making, and a strong sense of community, recognized through numerous awards for diversity and workplace excellence.
Equal Opportunity
- Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.