Sr. Manager Silicon Design Engineering at Advanced Micro Devices, Inc | Austin, TX, US | Rezi

Sr. Manager Silicon Design Engineering at Advanced Micro Devices, Inc

Sr. Manager Silicon Design Engineering

Advanced Micro Devices, Inc · Austin, TX, US

4 days ago

Sr. Manager Silicon Design Engineering

Advanced Micro Devices, Inc · Austin, TX, US

4 days ago
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About the Role

This is a manager role for ASIC Hardware and Firmware Co-Verification Engineering within the Security IP Team (SECIP) at AMD. The primary focus is to lead and manage the team responsible for Hardware/Firmware co-verification of embedded micro-processor subsystems and associated hardware accelerators in leading-edge SoCs. The role also involves contributing to Firmware development initiatives and understanding Firmware-based HW verification.

Responsibilities

  • Lead a high-performance engineering team
  • Form and nurture a team
  • Lead the team, meet schedule commitments, and provide strong customer support
  • Collaborate with multi-functional leaders to drive AMD's success
  • Conduct performance reviews and manage career development for team members
  • Manage the team responsible for implementing and executing hardware/firmware co-verification in UVM System Verilog and C-DPI structured testbenches
  • Manage the team responsible for hardware/firmware co-verification on FPGA hardware prototype platforms
  • Develop and maintain subsystem verification architecture, testbench, and test methodology for embedded CPUs and subcomponent IPs with AXI/AHB buses and HW accelerators (e.g., Cryptography, Data Compression, DMA)
  • Participate in subsystem specification and influence IP micro-architecture development (HW and FW co-design and verification aspects)
  • Develop and verify abstracted performance models for FW and HW
  • Create abstracted FW and HW performance models
  • Develop critical target code to collect IP performance key parameters
  • Explore subsystem architecture performance trade-offs for FW and HW optimization
  • Drive the team to develop and execute subsystem and block-level test plans
  • Develop FW/HW co-verification methodology
  • Develop UVC and System Response models
  • Develop and debug UVM and C-DPI test cases with integrated FW
  • Improve verification metrics
  • Further develop subsystem and block-level testbenches using UVM randomized test methodology and C-DPI directed test methodology
  • Develop and maintain subsystem-level integration scripts
  • Develop and maintain subsystem testbench build and test run scripts
  • Drive to verification metrics closure
  • Interface with SoC integration and SoC DV teams
  • Define and develop IP-level DV APIs to support SoC-level DV efforts
  • Develop and maintain IP build and delivery infrastructure to support SoC-level integration of SMU IPs
  • Support SoC-level IP emulation, silicon bring-up, and debugging efforts

Requirements

  • Experience leading others in technical and managerial settings
  • Excellent communication, writing, and presentation skills
  • Strong leadership experience with distributed teams
  • Strong mentoring and coaching skills
  • Proven experience managing and leading engineering teams
  • Prior experience in optimizing performance (client, server, system, or embedded)
  • Strong system and software engineering background
  • Strong analytical and problem-solving skills, including the ability to analyze current behavior, identify improvement areas, and design experiments
  • Must be a self-starter and self-motivated
  • Prior experience managing technical teams

Skills

  • ASIC Hardware and Firmware Co-Verification
  • Security IP
  • Embedded micro-processor subsystems verification
  • Hardware accelerators verification
  • Firmware development
  • Firmware-based HW verification
  • UVM System Verilog
  • C-DPI
  • FPGA hardware prototype platform
  • Embedded CPU verification
  • AXI/AHB busses
  • Cryptography verification
  • Data Compression verification
  • DMA verification
  • Subsystem specification
  • IP micro-architecture development
  • Performance modeling
  • Target code development
  • Performance trade-off analysis
  • Test plan development and execution
  • UVC development
  • System Response model development
  • Testbench development
  • Integration scripts development
  • Build and test run scripts development
  • SoC integration
  • SoC DV
  • IP level DV API development
  • IP build and delivery infrastructure
  • SoC level integration
  • IP emulation
  • Silicon bring-up
  • Debugging
  • System engineering
  • Software engineering
  • Communication skills
  • Analytical skills
  • Problem-solving skills

Location

  • AUSTIN TX
  • MARKHAM, ON
  • OTTAWA, ON

Work Type

  • HYBRID

Experience Level

  • Manager

Education Level

  • Bachelors or Masters degree in computer engineering/Electrical Engineering

Benefits

  • AMD benefits at a glance

About the Company

  • At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us.
  • AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI.
  • Every role at AMD contributes to something bigger — technology that moves the world forward.

Equal Opportunity

  • AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.
  • We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.