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About the Role

SambaNova is seeking a Principal RTL Design Engineer to lead the microarchitecture and RTL development for their next-generation Reconfigurable Dataflow Unit (RDU), the core silicon for their AI acceleration systems. This senior individual contributor role involves owning a block from microarchitecture specification through RTL, quality closure, and tape-out, managing power, performance, and area trade-offs for aggressive frequency targets.

Responsibilities

Own the microarchitecture and RTL for a major block or subsystem of the RDU, from specification through tape-out, including writing specs for complex blocks in compute, memory, or on-chip network subsystems.
Write, integrate, and debug synthesizable SystemVerilog RTL through the full chip implementation and production lifecycle.
Own PPA for your area, hitting aggressive frequency targets through datapath pipelining, retiming, and microarchitectural restructuring.
Drive timing closure and design quality for your area: synthesis, STA, critical-path iteration, lint, CDC, LEC, and SystemVerilog Assertions capturing design intent.
Partner with design verification to define verification intent and coverage for your block, and support debug of functional and gate-level failures.
Work with architects and software teams to prototype and evaluate features that improve application-level performance.
Drive AI, automation, and new EDA tool methodologies into the design flow.
Set the technical bar in design reviews and mentor design engineers.

Requirements

B.S. in Electrical Engineering, Computer Engineering, or Computer Science.
7+ years of industry experience in ASIC RTL design.
Mastery of synthesizable SystemVerilog for high-speed, high-performance ASICs, including SVA to capture design intent.
High-frequency design experience, including datapath pipelining, retiming, critical-path restructuring, and other microarchitectural techniques for hitting aggressive frequency targets.
Deep foundation in computer architecture and digital logic design, including arbitration, flow control, clock domain crossing, and memory structures.
Ownership of a complex block or subsystem from microarchitecture specification through tape-out on at least one production ASIC.
Experience converging power, performance, and area against real physical constraints, including floorplan, congestion, and timing feedback from the physical design team.
Hands-on experience with synthesis and static timing analysis, and with lint, CDC, and LEC quality flows.
Demonstrated technical leadership without formal authority, including setting direction in design reviews, arbitrating microarchitecture decisions, and mentoring engineers.
Scripting in Python for design and flow automation.

Skills

SystemVerilog
SVA
Datapath pipelining
Retiming
Microarchitectural restructuring
Synthesis
Static Timing Analysis (STA)
Lint
CDC
LEC
Python scripting
AXI
PCIe
Ethernet
HBM
DDR
AI
ML workload acceleration
Dataflow architectures
Reconfigurable architectures
Formal property checking
Performance modeling
Claude

Location

On-premises
Cloud

Work Type

Full-time

Experience Level

Principal
7+ years industry experience

Education Level

B.S. in Electrical Engineering, Computer Engineering, or Computer Science
M.S. or Ph.D. in Electrical Engineering, Computer Engineering, or Computer Science

Salary/Compensations

$180,000—$255,000 USD

Benefits

Equity
95% premium coverage for employee medical insurance
77% premium coverage for dependents
Health Savings Account (HSA) with employer contribution
Dental insurance
Vision insurance
Short-term Disability insurance
Long-term Disability insurance
Basic Life insurance
Voluntary Life insurance
Accidental Death & Dismemberment (AD&D) insurance
Flexible Spending Account (FSA) options (Health Care, Limited Purpose, Dependent Care)
Headspace subscription
Gympass+ membership
One Medical membership
Counseling services with an Employee Assistance Program

About the Company

SambaNova Suite™ is the first full-stack, generative AI platform, from chip to model, optimized for enterprise and government organizations.
Powered by the intelligent SN40L chip, the SambaNova Suite is a fully integrated platform, delivered on-premises or in the cloud, combined with state-of-the-art open-source models that can be easily and securely fine-tuned using customer data for greater accuracy.
Once adapted with customer data, customers retain model ownership in perpetuity, so they can turn generative AI into one of their most valuable assets.

Equal Opportunity

SambaNova Systems is an Equal Opportunity/Affirmative Action Employer.
All qualified applicants will receive consideration for employment without regard basis of age (40 and over), color, disability, gender identity, genetic information, marital status, military or veteran status, national origin/ancestry, race, religion, creed, sex (including pregnancy, childbirth, breastfeeding), sexual orientation, and any other applicable status protected by federal, state, or local laws.