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About the Role
We are seeking a highly skilled and experienced Senior Staff RF/Analogue IC CAD Engineer to join our engineering team. In this role, you will be responsible for developing, maintaining, and optimizing CAD environments, design flows, and methodologies to support the delivery of world-class RF and analogue integrated circuits. As a Senior Staff engineer, you will provide technical leadership, influence cross-functional CAD strategy, and serve as a subject matter expert across the organization.
Responsibilities
- Design, develop, and maintain Cadence-based CAD flows for RF and analogue IC design, including schematic capture, simulation, layout, and verification.
- Develop and maintain SKILL/SKILL++ scripts and automation to enhance designer productivity within the Cadence Virtuoso environment.
- Manage and support simulation frameworks using tools such as Spectre, ADE, and Maestro, including setup of corner libraries, Monte Carlo, and process variation analyses.
- Own and maintain physical verification flows, including LVS, DRC, PERC, and ERC, ensuring clean sign-off at all stages of the design cycle.
- Collaborate with foundry partners to integrate and qualify PDK updates and new process nodes.
- Manage design data and CAD assets using version control systems, including Design Sync (Mentor/Siemens), ensuring integrity and traceability throughout the design lifecycle.
- Provide technical leadership, mentoring, and CAD support to design and layout engineers at all levels.
- Participate in design reviews and contribute to the overall quality of IC deliverables.
- Influence and shape long-term CAD strategy in collaboration with senior engineering leadership.
Requirements
- Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
- Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
- PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
- Fully competent in Cadence-based RF/analogue CAD environments, physical verification flows, and SKILL automation.
- Ensures quality and integrity of CAD solutions; works with design and project leads to ensure timely and reliable delivery of design infrastructure.
Skills
- Cadence-based CAD flows
- SKILL/SKILL++ scripting
- Spectre, ADE, Maestro
- Physical verification flows (LVS, DRC, PERC, ERC)
- Design Sync (Mentor/Siemens)
- Python scripting
- Regression frameworks
- Automated simulation/checking environments
- Backend flows
- Mixed-signal design flows
- EM simulation tools (Momentum, EMX, HFSS)
- Git or Perforce
- Interpersonal and communication skills
Location
- Farnborough, Hampshire, UK
- Sophia Antipolis, France
Work Type
- Full-time
Experience Level
- Senior Staff
Education Level
- Bachelor's degree
- Master's degree
- PhD
About the Company
- Qualcomm Technologies International Ltd is an equal opportunity employer.
- Qualcomm is committed to providing an accessible process for individuals with disabilities.
- Qualcomm is committed to making our workplace accessible for individuals with disabilities.
- Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
Equal Opportunity
- Qualcomm is an equal opportunity employer.
- If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process.
- Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process.
- Qualcomm is also committed to making our workplace accessible for individuals with disabilities.