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About the Role

The Director, Pathfinding Solutions will serve as a deep technical leader and hands-on contributor who develops next-generation semiconductor process solutions spanning logic and memory device architectures. This individual will operate at the intersection of process engineering, device physics, and materials science — working across Applied's product Business Units to assemble and de-risk integrated pathfinding solutions for N+1, N+2 and beyond technology nodes. This is a technically distinguished individual contributor role at the E5 / Director level. The ideal candidate is a recognized expert in advanced semiconductor process integration — someone who can independently conceive, develop, and demonstrate pathfinding solutions, engage credibly with customer technologists at senior levels, and influence Applied's product roadmaps through deep technical insights. This is not a traditional people management role; it is a technical leadership position that demands world-class expertise, creativity, and execution.

Responsibilities

Develop and demonstrate integrated pathfinding process solutions for advanced logic (GAA, CFET) and / or memory (DRAM 4F2, 3D DRAM, NAND) device architectures
Drive hands-on process development spanning deposition, etch, implant, epitaxy, CMP, and thermal processing — connecting individual process steps into integrated module flows
Identify and de-risk critical process challenges for N+1 and N+2 (solving integration problems) technology nodes through systematic experimentation and DTCO (Design-Technology Co-Optimization) analysis
Translate customer device performance targets (e.g., contact resistance reduction, carrier mobility enhancement, low-k integration, high-selectivity etch) into actionable Applied process solutions
Work across Applied's product BUs to assemble end-to-end process flows that demonstrate Applied's differentiated value
Partner with BU development teams to influence product roadmaps based on pathfinding learnings and customer requirements
Collaborates with DTCO for integration-level analysis that connects individual process capabilities to device-level performance metrics (Vt, Idsat, leakage, RC delay, capacitance, resistance, strain, thermal, NAND)
Coordinate wafer flow, DOE design, and data analysis across multiple BU tools and process modules
Engage directly with senior technologists at key customers (Samsung, Intel, TSMC, SK Hynix, Micron etc) as a credible technical peer — presenting data, discussing integration approaches, and aligning on pathfinding priorities
Lead technical discussions in customer Technology Review Meetings (TRMs), performance task forces, and pathfinding workshops
Translate customer integration challenges into Applied-actionable development programs and demo plans
Support customer co-development engagements by providing deep process expertise and integration guidance
Publish at premier conferences (IEDM, VLSI, ISSCC, IRPS) and in top journals to establish Applied's technical leadership in pathfinding
Build a strong patent portfolio in advanced process integration and pathfinding solutions
Contribute to Applied's internal technical community through seminars, reviews, and mentoring of junior engineers
Stay at the forefront of semiconductor technology trends — including device architecture evolution, new materials, and emerging integration challenges

Requirements

Ph.D. in Electrical Engineering, Materials Science, Chemical Engineering, Physics, or a related semiconductor discipline
10+ years of experience in semiconductor process development, integration, or device engineering — with deep expertise in FEOL, MOL, or BEOL process technologies
Demonstrated hands-on track record of developing integrated process solutions for advanced logic and/or memory nodes
Strong publication record at top-tier semiconductor conferences (IEDM, VLSI, IRPS) and/or a significant patent portfolio
Experience engaging directly with customer technical teams at major semiconductor manufacturers (IDMs, foundries, memory makers)
Deep understanding of device physics, process-structure-property relationships, and DTCO principles
Ability to work effectively across organizational boundaries — coordinating with multiple BUs, product teams, and customer organizations
Exceptional analytical, problem-solving, and communication skills
Experience collaborating with or working at a semiconductor equipment or materials company with exposure to multiple process technologies
Track record as a Distinguished Member of Technical Staff (DMTS) or equivalent technical leadership designation
Experience with advanced device architectures including Gate-All-Around (GAA), Complementary FET (CFET), 3D DRAM, or 4F2 DRAM, NAND
Familiarity with advanced metallization (Mo, Cu, W, etc.), selective processes, and novel patterning approaches
Prior experience at a leading semiconductor manufacturer in a process integration or device engineering role
Strong network in the semiconductor technical community

Skills

Process engineering
Device physics
Materials science
Semiconductor process integration
Deposition
Etch
Implant
Epitaxy
CMP
Thermal processing
DTCO
Device performance targets
Contact resistance reduction
Carrier mobility enhancement
Low-k integration
High-selectivity etch
Wafer flow
DOE design
Data analysis
Customer technical engagement
Technical thought leadership
Advanced device architectures
Gate-All-Around (GAA)
Complementary FET (CFET)
3D DRAM
4F2 DRAM
NAND
Advanced metallization
Selective processes
Novel patterning approaches

Location

Albany, NY

Work Type

Full time
Assignee / Regular

Experience Level

E5 / Director level
10+ years of experience

Education Level

Ph.D. in Electrical Engineering, Materials Science, Chemical Engineering, Physics, or a related semiconductor discipline

Salary/Compensations

$200,000.00 - $275,000.00

Benefits

Supportive work culture
Encourages learning, development, and career growth
Empowers team to push boundaries
Learning every day
Comprehensive benefits package
Potential eligibility for bonus and stock award program

About the Company

Applied Materials is the global leader in materials science and engineering solutions that are at the foundation of virtually every new semiconductor chip and advanced display in the world.
The equipment that we create and service is essential to advancing AI and accelerating the commercialization of next-generation semiconductor chips.
Join us and push the boundaries of materials science and engineering in a company at the foundation of the electronics industry.
The work we do together advances the world’s technology.

Equal Opportunity

Applied Materials is an Equal Opportunity Employer. Qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, ancestry, religion, creed, sex, sexual orientation, gender identity, age, disability, veteran or military status, or any other basis prohibited by law.
In addition, Applied endeavors to make our careers site accessible to all users. If you would like to contact us regarding accessibility of our website or need assistance completing the application process, please contact us via e-mail at Accommodations_Program@amat.com, or by calling our HR Direct Help Line at 877-612-7547, option 1, and following the prompts to speak to an HR Advisor. This contact is for accommodation requests only and cannot be used to inquire about the status of applications.