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About the Role

Meta designs and deploys its own AI systems. MTIA is Meta's family of in-house AI accelerator ASICs, running recommendation and ranking workloads in production across Meta's data centers today and expanding into generative AI inference and training. The MTIA Software team builds the entire stack a chip vendor would normally supply, co-designing it with silicon teams. The AI kernel and optimization software development team drives the layer where architecture meets arithmetic, focusing on performance and programmability at scale. We are hiring an experienced kernel and performance engineer to own the performance of workloads that serve billions of people.

Responsibilities

Design, implement, and optimize high-performance compute and communication kernels for MTIA accelerators, taking ownership from architectural analysis through production deployment
Profile and root-cause performance across the full stack and drive the fixes to the right layer
Build and extend kernel authoring frameworks, templates, and libraries
Deliver and maintain broad kernel coverage for PyTorch operators across recommendation, ranking, and generative AI workloads
Partner with silicon architecture and design teams on hardware/software co-design
Work with compiler, runtime, framework, and product-facing teams to land end-to-end wins on production models
Investigate numerics and precision trade-offs, and design software mitigations that recover performance or accuracy lost to hardware limitations
Set technical direction for a kernel domain, write design documents, and mentor engineers

Requirements

Bachelor's degree in Computer Science, Computer Engineering, a related technical field, or equivalent practical experience
6+ years of professional experience in high-performance computing, accelerator kernel development, compiler backends, or systems performance engineering
Proficiency in C++ and Python, including low-level systems programming, templates and generic programming, and comfort reading and writing performance-critical code
Demonstrated experience writing and optimizing kernels for a parallel architecture
Working knowledge of computer architecture as it applies to performance
A rigorous, measurement-driven approach to performance: the ability to build a roofline or analytical model, profile against it, and explain the residual gap

Skills

GEMM and attention variants
Normalization
Collectives
Elementwise and reduction fusions
Sparse and quantized paths
Low-precision formats (FP8, MX-style block-scaled types, integer quantization)
Templateized, composable C++ kernel SDKs
Python DSLs
Compiler-facing interfaces
Pre-silicon and bring-up
Software mitigations for hardware realities
Transformer and attention kernel design
MLIR
LLVM
TVM
XLA
Halide
PyTorch
vLLM
SGLang

Location

Remote

Work Type

Full-time

Experience Level

Senior level

Education Level

Bachelor's degree

Salary/Compensations

$154,003/year to $217,000/year

Benefits

bonus
equity

About the Company

Meta designs and deploys its own AI systems.
MTIA — the Meta Training and Inference Accelerator — is Meta's family of in-house AI accelerator ASICs, running recommendation and ranking workloads in production across Meta's data centers today and expanding into generative AI inference and training as successive silicon generations land.
The MTIA Software team is part of the AI & Compute Foundation (ACF) organization within Meta Infrastructure.
Because the hardware is ours, the software is ours too: we build the entire stack a chip vendor would normally supply — compiler and LLVM toolchain, runtime, kernel authoring frameworks and libraries, developer tooling, and deep PyTorch integration — and we co-design it with the silicon teams generation over generation.
Within that stack, the AI kernel and optimization software development team drives the layer where architecture meets arithmetic.
Our mission is performance and programmability at scale: hit roofline enablements on the workloads that matter, and make kernel authoring accessible enough that the whole organization can close coverage gaps without funneling every problem through a handful of experts.
We do this by shipping high-performance kernel libraries with broad PyTorch operator coverage, by building the C++ and Python kernel authoring frameworks and DSL surfaces that others build on, and by writing production kernels against new architectures long before first silicon — turning hardware proposals into measured roofline evidence while the design can still change.