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About the Role

As a key member of our Frontend CAD (FE CAD) department, you will play a crucial role in optimizing methodologies and EDA workflows, ensuring seamless adoption of industry best practices for crafting efficient System-on-Chips (SoCs).

Responsibilities

• Develop, deploy, and support complex tool flows in Frontend Design & Verification
• Drive innovation in design processes and methodologies
• Foster cross-functional collaboration with design, verification, testing, and manufacturing teams
• Identify and address technical challenges during the silicon design process
• Implement processes for ensuring silicon design quality through rigorous design reviews and testing methodologies
• Troubleshoot and optimize workflows to increase efficiency across our global engineering community
• Communicate effectively with multiple teams to facilitate seamless collaboration

Requirements

• Years of Hands-on experience in ASIC IP/ASIC SoC design, RTL, Verilog, UVM, and SystemVerilog
• Exposure to front-end tools including Verilog simulators, RTL/Verification linters, and clock domain crossing checkers
• Familiarity with synthesis, static timing analysis, and Design-For-Test (DFT)
• Proficiency in scripting languages such as Perl, Python, bash, or csh
• Effective communication and presentation skills
• BS/MS in Electrical Engineering, Computer Science, or similar field
• Several years of hands-on industry experience

Skills

• SystemVerilog assertions
• Checkers
• Advanced design verification techniques
• CloudBees Jenkins continuous integration methodologies
• Modern design methodologies and techniques
• Compute batching solutions such as LSF (Load Sharing Facility), Slurm, or Altair

Location

• Austin, Texas

Work Type

• On-Site
• Hybrid
• Full-time

Experience Level

• Experienced role

Education Level

• BS/MS in Electrical Engineering, Computer Science, or similar field

Salary/Compensations

• The salary range for this position is dependent on various factors including, but not limited to, location, and the candidate’s combination of job-related knowledge, qualifications, skills, education, training, and experience.
• Your pay also includes the opportunity for an annual bonus.

Benefits

• Choice of three medical plan options
• Dental plan option
• Company credits towards medical and dental premiums
• 401(k) Plan with automatic 3% company contribution and matching
• Company credits for basic life insurance and basic accidental death and dismemberment coverage
• Company credits for short-term and long-term disability coverage
• Option to participate in Ericsson’s Stock Purchase Plan
• 15 days of accrued vacation
• Up to 3 personal days per year
• 11 annual holidays
• 8 hours of volunteer time
• 80 hours of sick time annually
• Up to 16 weeks of paid maternity leave
• 6 weeks of parental or adoption leave at 100% of pay
• Financial wellness programs
• Educational assistance
• Matching gifts
• Recognition programs

About the Company

• Ericsson Silicon is part of the Ericsson engineering unit, developing state-of-the-art ASICs and FPGAs targeting the newest technology nodes for Ericsson's 5G telecommunication product portfolio.
• We're establishing a dynamic Frontend CAD department dedicated to defining methodologies and EDA workflows across our global R&D sites in Austin, Stockholm, and Lund.
• This department offers exceptional opportunities for career growth and access to deep technical knowledge.
• Work on cutting-edge 5G technology and the latest process nodes
• Collaborate with talented engineers across multiple global sites
• Opportunities for continuous learning and career development
• Shape industry best practices and methodologies
• Contribute to innovative solutions in silicon design

Equal Opportunity

• Ericsson uses a merit-based hiring approach that values people with different experiences, perspectives and skillsets.
• We encourage people from all backgrounds to apply and realize their full potential as part of our Ericsson team.
• Ericsson is proud to be an Equal Opportunity employer, learn more.