Impress employers and recruiters.
Choose from hundreds of resume examples.

Impress employers and recruiters.
Choose from hundreds of resume examples.

Target Resume Now

About the Role

Tenstorrent is revolutionizing AI technology with cutting-edge solutions that redefine performance, ease of use, and cost efficiency. Our Tensix team is building custom AI compute cores, RISC-V CPUs, and chiplet-based architectures for datacenter, edge, and automotive AI. Design Verification Engineers on this team validate compute IP and subsystems and build scalable DV infrastructure.

Responsibilities

• Contribute to verification of Tensix IP and subsystems from early planning through tape-out, owning coverage goals and driving them to closure.
• Build and maintain reusable verification environments, agents, scoreboards, and supporting infrastructure in SystemVerilog and Python.
• Develop constrained-random and directed tests and close functional, code, and assertion coverage using data-driven approaches.
• Debug complex issues across RTL and testbench while collaborating with design, firmware, compiler, and architecture teams.
• Help evolve DV infrastructure including regression flows, CI/CD integration, EDA compute environments, and reproducible setups.

Requirements

• Experienced in modern verification methodologies with strong SystemVerilog skills and exposure to structured testbench development.
• Comfortable working from block-level to system-level verification and reasoning about microarchitecture behavior from specs and waveforms.
• Proficient in Linux environments with Python, or Bash scripting for automate builds, parse logs, manage CI pipelines.
• Skilled in coverage-driven verification and confident debugging across RTL, testbench, and workload scenarios.
• Motivated by AI hardware and eager to learn verification strategies for new architectures and domains.
• Exposure to functional safety (FuSa) verification concepts for automotive AI workloads.
• Familiarity with formal verification methodologies, SVA (SystemVerilog Assertions), or formal property verification for complex control logic and microarchitectural corner cases.

Skills

• SystemVerilog
• Python
• Bash scripting
• Coverage-driven verification
• RTL debugging
• Testbench debugging
• Workload debugging
• Functional safety (FuSa) verification
• Formal verification
• SVA (SystemVerilog Assertions)

Location

• Toronto, ON
• Austin, TX
• Belgrade, Serbia

Work Type

• Hybrid

Experience Level

• Various experience levels

Salary/Compensations

• $100k - $500k

Benefits

• Highly competitive compensation package

About the Company

• Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency.
• With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors.
• Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible.
• We value collaboration, curiosity, and a commitment to solving hard problems.
• We are growing our team and looking for contributors of all seniorities.

Equal Opportunity

• We are an equal opportunity employer.