Impress employers and recruiters.
Choose from hundreds of resume examples.

Target Resume Now

About the Role

As an RTL and PD Design Engineer at Normal, you will optimize RTL through synthesis and the backend to produce GDSII ready for tapeout. This role involves classical ASIC design, novel computing architectures, and a development environment where hardware and algorithms are built together. You will own RTL from microarchitecture to tapeout, including specifications, SystemVerilog, verification, and physical design.

Responsibilities

Write and own synthesizable RTL in SystemVerilog across blocks ranging from datapath logic to control and memory interfaces.
Work with architecture to translate high-level specifications into implementable microarchitectures.
Work closely with the verification team to review verification plans, assist on debug, and become a partner in closing coverage.
Take synthesized RTL gates through the full backend design flow, including floorplanning, detailed place and route, CTS, DFT insertion, timing closure, and LVS/DRC.
Participate in design reviews and contribute to architecture decisions.
Create and signoff tapeout checklists, and support post-silicon characterization bring-up as needed.

Requirements

Hands-on experience writing production RTL in SystemVerilog and closing it through synthesis and place-and-route.
At least three tapeouts in your background, from any node and any company size.
Experience working on datapaths, pipelines, or custom logic where the microarchitecture was not fully specified upfront.
Strong debugging instincts across simulation, waveforms, and formal counterexamples.
Ability to work directly with architects, design verification, and fab representatives.

Skills

SystemVerilog
RTL Design
Microarchitecture
Physical Design
Synthesis
Place and Route
Timing Closure
LVS/DRC
Debugging
RISC-V

Location

New York
Silicon Valley
London
Copenhagen
Seoul

Work Type

Full-time

Experience Level

All seniority

About the Company

Normal Computing builds silicon that turns thermal noise from an obstacle into a computational resource, resulting in 10-100x more AI inference per dollar, per watt.
They co-design the full stack: AI-native EDA systems and advanced ASICs.
Backed by $85M+ from leading deep-tech investors and built by experts from the labs that built modern computing.
Normal works as one team across New York, Silicon Valley, London, Copenhagen, and Seoul.
They hire people who want the hardest version of their craft, across every discipline, at every seniority.

Equal Opportunity

Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.
By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Privacy Policy.