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About the Role

Intel is seeking a passionate and skilled Analog Layout Design Engineer to join our diverse and inclusive team. As a critical contributor to our design ecosystem, you will drive the creation and optimization of complex layouts for analog signal circuits, ensuring that our designs meet stringent performance, area, and reliability requirements. Your work will directly impact Intel's cutting-edge technologies, enabling the development of innovative solutions that empower businesses and transform industries. In this collaborative role, you will work with cross-functional teams, including analog circuit design, process technology, and package design, to deliver layouts that are efficient, robust, and aligned with our high standards of excellence. We welcome candidates from all backgrounds who are eager to contribute to groundbreaking advancements while expanding their expertise in layout methodologies.

Responsibilities

Design complex layouts of analog signal circuits based on detailed design specifications.
Conduct a comprehensive set of design verification checks, including process design rules, electron migration, voltage drop (IR), ESD, and other reliability assessments.
Develop and analyze floorplans, power grids, ESD structures, and bump layouts to meet performance and electrical requirements.
Perform floor planning and detailed signal planning for complex analog circuits, ensuring optimization for area, power, reliability, and performance.
Drive the development and implementation of innovative analog layout methodologies to improve productivity and layout quality.
Troubleshoot issues related to design, tools, flows, and methodologies utilized in analog layout design.
Collaborate closely with cross-disciplinary teams to meet design specifications, align on requirements, and negotiate layout tradeoffs.

Requirements

Bachelor's degree or equivalent experience in Electrical Engineering, Computer Engineering, or a related field of study with 3+ years of experience. Or a Master’s degree in the same field with 2+ years experience.
Experience in Analog device and metal layout fundamentals, including analog/mixed-signal fundamentals.
Experience with Cadence Virtuoso Layout Suite and Calibre/ ICV DRC for design and verification tasks.
Experience with CMOS technologies and high-voltage rules.
Experience with Floor planning and hierarchical layout planning for analog and mixed-signal blocks.
Experience conducting performance verification for layouts and debug layout-related issues.
Strong understanding of analog layout effects including mismatch, parasitics, IR drop, electromigration (EM), and their impact on circuit performance.
Apply best practices for common-centroid, interdigitation, and symmetry-based layouts to minimize mismatch and variation.
Evaluate and mitigate process variations and gradient effects across sensitive analog blocks.
Ensure robust layout through parasitic-aware design, working closely with extraction (xtract/spef) and simulation teams.
Debug layout-related issues by correlating LVS, DRC, xtract, and silicon behavior.
Optimize layouts for noise isolation, shielding, and signal integrity, especially in mixed-signal environments.

Skills

Analog device and metal layout fundamentals
Analog/mixed-signal fundamentals
Cadence Virtuoso Layout Suite
Calibre/ ICV DRC
CMOS technologies
High-voltage rules
Floor planning
Hierarchical layout planning
Performance verification
Layout debugging
Mismatch
Parasitics
IR drop
Electromigration (EM)
Common-centroid layouts
Interdigitation
Symmetry-based layouts
Process variations
Gradient effects
Parasitic-aware design
Extraction (xtract/spef)
Simulation
LVS
DRC
Silicon behavior correlation
Noise isolation
Shielding
Signal integrity
Mixed-signal environments

Location

US, Oregon, Hillsboro
US, Texas, Austin

Work Type

Hybrid

Experience Level

3+ years of experience
2+ years experience

Education Level

Bachelor's degree or equivalent
Master's degree

Salary/Compensations

$122,440.00-172,860.00 USD

Benefits

Competitive pay
Stock bonuses
Health benefits
Retirement benefits
Vacation benefits

About the Company

Intel invests in our people and offers a complete and competitive package of benefits employees and their families through every stage of life.
Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices.

Equal Opportunity

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.