Product Engineer II (EMIR / PDN Analysis & Power Integrity) at Cadence Design Systems | Austin, Texas, USA | Rezi

Product Engineer II (EMIR / PDN Analysis & Power Integrity) at Cadence Design Systems

Product Engineer II (EMIR / PDN Analysis & Power Integrity)

Cadence Design Systems · Austin, Texas, USA

Yesterday

Product Engineer II (EMIR / PDN Analysis & Power Integrity)

Cadence Design Systems · Austin, Texas, USA

a day ago
Resume preview

Impress employers and recruiters.
Choose from hundreds of resume examples.

Target Resume Now

About the Role

Be part of the product engineering team working on a Power Noise Reliability analysis platform within the Digital Sign-off Group at Cadence. Build domain expertise in power integrity, 3DIC analysis & optimization, industry’s first AI-driven IR mitigation & fixing methodology, and electrothermal optimization for digital designs. Work closely with R&D to facilitate the development of these methodologies and flows. Support strategic customers and functional product engineering by driving solutions in the Multiphysics space.

Responsibilities

  • Be part of the product engineering team working on Power Noise Reliability analysis platform within Digital Sign-off Group at Cadence.
  • Build domain expertise in power integrity , 3DIC analysis & optimization , Industry’s first AI driven IR mitigation & fixing methodology , electrothermal optimization for digital designs.
  • Work closely with R&D to facilitate the development of these methodologies and flows.
  • Support strategic customers and functional product engineering driving solutions in the Multiphysics space.

Requirements

  • Bachelor’s Degree in Electrical / VLSI Engineering with 3+ years related experience OR Masters with relevant courses in digital systems in Electrical Engineering
  • Coursework related to advanced digital logic design and advanced Very Large Scale Integrated-circuit (VLSI)
  • Fundamental understanding in Digital logic Design, CMOS logic Design, Power IR drop analysis, Circuit Design and Analysis, Digital and Behavioral simulations
  • Relevant coursework/projects or experience in physical design implementation flow using automatic placement and routing tool.
  • Ability to debug IR drop, Timing, and Electrical PDN issues in relation to IR and EM is a plus
  • Knowledge on Python or TCL scripting.
  • Must possess strong written, verbal and presentation skills.
  • Ability to establish a close working relationship with both customer peers and management.
  • Explore what’s possible to get the job done, including creative use of unconventional solutions.
  • Work effectively across functions and geographies.
  • Push to raise the bar while always operating with integrity.

Skills

  • Power integrity
  • 3DIC analysis & optimization
  • AI driven IR mitigation & fixing methodology
  • Electrothermal optimization
  • Digital logic design
  • Advanced VLSI
  • CMOS logic Design
  • Power IR drop analysis
  • Circuit Design and Analysis
  • Digital and Behavioral simulations
  • Physical design implementation flow
  • Automatic placement and routing tool
  • IR drop debugging
  • Timing debugging
  • Electrical PDN issues debugging
  • Python scripting
  • TCL scripting

Location

  • California

Work Type

  • Full-time

Experience Level

  • 3+ years related experience

Education Level

  • Bachelor’s Degree in Electrical / VLSI Engineering
  • Masters with relevant courses in digital systems in Electrical Engineering

Salary/Compensations

  • $101,500 to $188,500

Benefits

  • Incentive compensation: bonus, equity, and benefits
  • Paid vacation and paid holidays
  • 401(k) plan with employer match
  • Employee stock purchase plan
  • Variety of medical, dental and vision plan options

About the Company

  • At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
  • We’re doing work that matters. Help us solve what others can’t.