About the Role
We are seeking a Senior Engineer to architect, implement, and maintain scalable build scripts and front-end methodology for complex digital IC designs. This role focuses on improving compilation, elaboration, simulation, and regression flow across block, subsystem, and full-chip designs, with an emphasis on performance, correctness, and developer productivity. The ideal candidate combines strong software engineering skills with deep understanding of ASIC/SoC design workflows and EDA tooling and enjoys owning end-to-end infrastructure used daily by large design and verification teams.
Responsibilities
- Design, implement, and maintain chip design build flows supporting block, subsystem, full-chip, and multi-chip simulations.
- Develop and own build scripts and orchestration logic for compile, elaborate, simulate, and regression workflows.
- Improve build performance through dependency analysis, incremental builds, caching, and flow optimization.
- Define and evolve methodology standards for front-end design and verification flows.
- Architect and enhance CI / pre-submit verification flows to improve quality and turnaround time.
- Integrate and support industry EDA tools within robust scripted flows.
- Collaborate with RTL, DV, methodology, and infrastructure teams.
- Debug complex infrastructure and build-system issues.
- Drive adoption through documentation and training.
Requirements
- Bachelor’s or Master’s degrees in electrical engineering, Computer Engineering, Computer Science, or related field.
- 8+ years of experience in ASIC/SoC design, verification, or methodology roles.
- Strong programming skills in Python and at least one of TCL, C/C++, or shell scripting.
- Experience with make-based or graph-based build systems.
- Understanding of front-end chip design flows.
- Experience debugging large-scale infrastructure issues.
- Familiarity with EDA toolchains.
- Strong problem-solving and collaboration skills.
- Experience with next-generation or programmable build flows.
- Experience with CI systems such as Jenkins.
- Experience with multi-chip or chiplet-based designs.
- Experience with Bazel or similar dependency-graph build systems.
- Experience with compute-farm environments.
- Experience mentoring junior engineers.
- Must be eligible to access export-controlled information as defined under applicable law.
- Applicants may be subject to an export license review process prior to employment.
Skills
- Python
- TCL
- C/C++
- Shell scripting
- Make-based build systems
- Graph-based build systems
- Front-end chip design flows
- EDA toolchains
- CI systems
- Jenkins
- Bazel
- Dependency-graph build systems
Experience Level
- Senior Engineer
- 8+ years of experience
Education Level
- Bachelor’s degree in electrical engineering, Computer Engineering, Computer Science, or related field
- Master’s degree in electrical engineering, Computer Engineering, Computer Science, or related field
Salary/Compensations
- 151,000 - 223,440, $ per annum
Benefits
- Employee stock purchase plan with a 2-year look back
- Family support programs
- Robust mental health resources
- Recognition and service awards
About the Company
- Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world.
- Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
- At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow.
- For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Equal Opportunity
- All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
- Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.
