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About the Role

As a SoC Logic Design Engineer, you will play a pivotal role in advancing Intel's next-generation System on Chip (SoC) designs. In this role, you will focus on developing high-quality logic designs, coding at the register transfer level (RTL), and optimizing performance to deliver energy-efficient and secure solutions. Your contributions will directly impact Intel's ability to deliver innovative and market-leading semiconductor technologies.

Responsibilities

Develop logic designs and RTL code for SoC blocks and subsystems aligned with architectural and microarchitectural specifications
Integrate IP blocks and subsystems into comprehensive full-chip SoC designs
Participate in the definition of architecture and microarchitecture features of the blocks being designed
Optimize logic designs to meet power, performance, area, and timing goals using advanced tools and strategies
Conduct quality checks to ensure design integrity and readiness for physical implementation
Review verification plans to confirm accuracy in tested design features and implement corrective measures for failing RTL tests
Apply secure development practices to address security models and objectives in hardware design
Collaborate with IP providers to integrate and validate IPs at the SoC level
Ensure quality assurance compliance for smooth IP/SoC handoff and design readiness

Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related specialized field with 4+ years of hands-on experience in logic design, RTL development, and microarchitecture implementation, or Master's degree with 3+ years of experience in the same fields
RTL coding languages such as Verilog
Expertise in SoC integration, SoC clocking, and low-power design methodologies
Experience in strategies for timing, power convergence, and physical implementation optimization
Hands-on experience with Clock Domain Crossing techniques and Network-on-Chip (NoC) architectures
Working experience with AMBA protocols such as CHI, AXI, AHB, and APB
Hands-on experience from spec to timing closure in at least one SoC/ASIC design

Skills

logic design
RTL development
microarchitecture implementation
RTL coding
Verilog
SoC integration
SoC clocking
low-power design
timing convergence
power convergence
physical implementation optimization
Clock Domain Crossing techniques
Network-on-Chip (NoC) architectures
AMBA protocols
CHI
AXI
AHB
APB

Location

US, Texas, Austin
US, California, Santa Clara
US, Oregon, Hillsboro

Work Type

hybrid
Experienced Hire

Experience Level

4+ years of hands-on experience
3+ years of experience

Education Level

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related specialized field
Master's degree

Salary/Compensations

$141,910.00-200,340.00 USD

Benefits

Competitive pay
Stock bonuses
Health benefits
Retirement benefits
Vacation benefits

About the Company

Intel's leading-edge silicon engineering group is dedicated to designing, developing, and scaling advanced semiconductor solutions for a wide range of applications.
This team focuses on integrating cutting-edge technology, ensuring quality standards, and driving innovation that supports Intel's commitment to delivering world-class products and solutions.
Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices.

Equal Opportunity

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.