Impress employers and recruiters.
Choose from hundreds of resume examples.

Target Resume Now

About the Role

As a SoC Design Verification Engineer, you will play a pivotal role in ensuring that Intel's complex System-on-Chip (SoC) designs meet functional specifications and deliver high-quality performance. You will design scalable and reusable verification plans, develop test environments, and execute tests to uncover issues and improve functionality. Your contributions will directly enhance Intel's product quality and ensure optimal performance in presilicon development.

Responsibilities

Create and update UVM-based test bench generation and test case creation
Define and develop scalable and reusable block, subsystem, and SoC verification plans
Create test benches and verification environments that align with microarchitecture specifications
Execute verification plans, including emulation and system simulation models, to ensure design functionality and uncover bugs
Debug and root cause issues in presilicon environments, implementing corrective measures to address failures
Collaborate with architects, RTL developers, postsilicon teams, and physical design teams to improve verification of complex architectural features
Document and maintain test plans, driving technical reviews with design and architecture teams
Integrate security coverage activities within test plans, including regression and debug tests
Maintain and improve existing functional verification infrastructure and methodologies
Absorb learnings from postsilicon development and incorporate feedback into improved verification strategies

Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with 4+ years of hands-on experience in SoC design verification, including demonstrated expertise in OVM/UVM methodologies, debugging, and test planning
Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with 3+ years of hands-on experience in SoC design verification, including demonstrated expertise in OVM/UVM methodologies, debugging, and test planning
Experience with AMBA protocols such as CHI, AXI, AHB, and APB with industry-standard VIP from various EDA vendors
Experience with creation and updating of UVM-based test benches and test case creation
Experience with postsilicon validation and incorporating feedback into presilicon test plans
Familiarity with emulation models and system simulation tools for performance analysis

Skills

OVM/UVM methodologies
Debugging
Test planning
AMBA protocols (CHI, AXI, AHB, APB)
Industry-standard VIP from EDA vendors
UVM-based test bench creation
Test case creation
Postsilicon validation
Emulation models
System simulation tools

Location

US, Texas, Austin
US, California, Santa Clara
US, Oregon, Hillsboro

Work Type

Hybrid
Experienced Hire
Shift 1

Experience Level

4+ years of hands-on experience in SoC design verification (with Bachelor's)
3+ years of hands-on experience in SoC design verification (with Master's)

Education Level

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field
Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field

Salary/Compensations

$141,910.00-200,340.00 USD

Benefits

Competitive pay
Stock bonuses
Health benefits
Retirement benefits
Vacation benefits

About the Company

Intel's cutting-edge product development group is focused on designing and verifying advanced semiconductor solutions.
This group is at the forefront of innovation, delivering high-quality, scalable products that drive Intel's leadership in technology and performance.
Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices.

Equal Opportunity

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.