About the Role
The Principal Design Engineer in Micron’s NVEG organization will own and evolve the timing-critical circuitry between the NAND array and page buffer. This role is for a designer who is equally strong in architecture, transistor-level implementation, and physical aware timing closure – and who can lead technical direction across teams to deliver robust, scalable datapath solutions. You will drive designs that directly impact throughput, timing margin, power and yield, partnering closely with page buffer, array device, clocking, physical design, test, and product teams.
Responsibilities
- Own internal NAND datapath circuits including array redundancy circuits, wave pipeline / pulse based datapath arctitechture and data line sensing circuits.
- Define scalable datapath architecture supporting multi-plane and high-parallelism operation.
- Define and analyse clock/data timing schemes for long interconnects and large-array topologies.
- Lead timing adjustment and skew management strategy.
- Drive layout-aware circuit design with attention to matching/symmetry for sensing paths, shielding/guarding for sensitive nodes.
- Perform parasitic-aware sizing and RC-driven timing closure.
- Consider array pitch constraints, blockages and repeatable layout templates.
- Partner tightly with layout to review critical routes and implement practical fixes.
- Perform SPICE/Fast-SPICE simulations across PVT, aging and variability via Monte Carlo.
- Define characterization structures and debug plans to correlate silicon behavior vs. simulation.
- Drive root-cause analysis for margin/yield issues tied to datapath timing, redundancy paths or sensing robustness.
- Lead design reviews and unblock partners with clear technical decisions.
- Mentor other engineers; create reusable design collateral (checklists, templates, signoff methodology).
- Communicate tradeoffs effectively (PPA, margin, schedule, risk) and propose mitigation plans.
- Communicate with project integration and other functional teams in design on specifications of major block interfaces.
Requirements
- BS or MS in Electrical Engineering with 8+ years of relevant experience
- Experience in physical design flows and optimization
- Proven ownership of blocks from concept -> design -> layout -> signoff -> silicon correlation
- Deep expertise in CMOS analog/mixed-signal circuit design and device physics fundamentals
- Deep expertise in High-speed datapath timing analysis (including nontraditional timing such as wave-pipelined/pulse-based)
- Deep expertise in Layout parasitics and physical implementation impact on circuit behavior
- Strong simulation and debug skills (SPICE/Fast-SPICE, corner/MC analysis, failure-mode thinking)
- Experience with managing complex design projects, effectively communicating progress and outcomes
Skills
- NAND datapath design
- DRAM datapath design
- Wave-pipelining
- Self-timed pipeline design
- Pulse-latched pipeline design
- Redundancy/repair architecture
- DRAM interface (e.g. DDR4/5, LPDDR5/6, HBM3/3E/4)
- Industry standard interfaces
- CMOS device understanding
- Device reliability understanding
Location
- USA
Work Type
- Full-time
Experience Level
- 8+ years of relevant experience
- Principal
Education Level
- BS or MS in Electrical Engineering
About the Company
- Micron Technology, Inc. is an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all.
- With a relentless focus on customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through its Micron® and Crucial® brands.
- The innovations created by Micron's people fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience.
Equal Opportunity
- All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.
- Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.
- Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.
