ASIC Engineer, Architecture at Meta | Austin, TX, US | Rezi

ASIC Engineer, Architecture at Meta

ASIC Engineer, Architecture

Meta · Austin, TX, US

1 months ago

ASIC Engineer, Architecture

Meta · Austin, TX, US

a month ago
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About the Role

Meta's Silicon Engineering organization is building custom silicon solutions for AI and data center workloads. As an ASIC Engineer, you will define and drive architectural performance analysis, pre-silicon modeling, and microarchitectural exploration of custom ASICs. You will establish modeling methodologies, develop workloads, and partner with cross-functional teams to ensure silicon meets demanding performance targets.

Responsibilities

  • Drive microarchitectural exploration and trade-off analysis across compute, memory subsystem, interconnect, and I/O domains to inform silicon architecture decisions.
  • Define and own the performance modeling strategy for custom infrastructure ASICs, including development of cycle-accurate and transaction-level simulation environments.
  • Develop and maintain C++ models of AI chip IPs and subsystems for architecture exploration, performance analysis, and software development.
  • Develop low-level workloads and kernels for machine learning training and inference applications.
  • Establish performance analysis methodologies, benchmarking frameworks, and bottleneck identification techniques across the full ASIC pipeline.
  • Collaborate with architecture, RTL design, and physical design teams to translate performance requirements into implementable microarchitectural specifications.
  • Partner with software and systems teams to co-optimize workload scheduling, firmware, and driver behavior against silicon performance characteristics.
  • Lead cross-functional technical reviews and communicate performance modeling results and architectural recommendations to engineering leadership.
  • Define long-term performance modeling infrastructure roadmaps, including tooling, automation, and simulation platform investments.
  • Mentor other engineers on performance modeling techniques, simulation methodology, and microarchitectural analysis best practices.
  • Identify and resolve performance gaps between modeled and measured silicon behavior through structured root-cause analysis and model calibration.

Requirements

  • Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.
  • 6+ years of experience in ASIC design, silicon engineering, or a related technical field.
  • Proficiency in C++ and Python for developing simulation models, automation frameworks, and performance analysis tools.
  • 5+ years of experience in ASIC performance modeling, microarchitectural analysis, or pre-silicon simulation for custom silicon or SoC designs.
  • Experience with performance analysis of data center, AI accelerator, or high-performance computing workloads on custom silicon.
  • Experience developing cycle-accurate or transaction-level performance models using C++ and SystemC for complex digital systems including processors, memory subsystems, or high-speed interconnects.
  • Experience defining microarchitectural specifications and driving cross-functional alignment across architecture, RTL, and physical design teams.
  • Experience with assembly programming languages, and compiler technologies.

Skills

  • C++
  • Python
  • ASIC performance modeling
  • Microarchitectural analysis
  • Pre-silicon simulation
  • Cycle-accurate modeling
  • Transaction-level modeling
  • SystemC
  • Assembly programming
  • Compiler technologies
  • AI numerics
  • Data types
  • Math functions
  • Precision/accuracy analysis
  • CUDA
  • GPU programming
  • Python-based automation pipelines
  • Post-silicon performance validation
  • Model-to-hardware correlation
  • Hardware description languages (SystemVerilog, VHDL)
  • High-level synthesis
  • Power-performance-area trade-off analysis

Experience Level

  • 6+ years of experience in ASIC design, silicon engineering, or a related technical field
  • 5+ years of experience in ASIC performance modeling, microarchitectural analysis, or pre-silicon simulation for custom silicon or SoC designs

Education Level

  • Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience

Salary/Compensations

  • $146,000/year to $209,000/year

Benefits

  • bonus
  • equity
  • benefits

About the Company

  • Meta's Silicon Engineering organization is building custom silicon solutions that power the infrastructure underpinning Meta's AI and data center workloads at scale.