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About the Role
As part of PEU Silicon and the Silicon CAD group, we are building the next generation of silicon development infrastructure and methodologies that power our ASIC roadmap. We are looking for a highly experienced Back-End CAD engineer who combines deep Physical Design expertise with a passion for automation, methodology development, and AI-driven innovation. This role goes far beyond traditional CAD support. You will own and evolve our Back-End implementation framework, FlowJam, working directly with Physical Design teams to deliver industry-leading Power, Performance, Area, and Productivity across multiple ASIC programs. You will help define how future physical implementation is performed—from advanced-node synthesis and place-and-route methodologies to AI-assisted design optimization and next-generation CAD infrastructure. If you enjoy solving hard problems, building scalable engineering platforms, and influencing the future of silicon development, we'd like to talk.
Responsibilities
- Lead the architecture, development, and evolution of FlowJam, our Back-End CAD flow framework.
- Partner closely with Physical Design teams to drive implementation methodology and execution across multiple ASIC programs.
- Develop and optimize synthesis, place-and-route, timing closure, power optimization, and signoff methodologies for advanced technology nodes.
- Drive continuous improvements in QoR, runtime, scalability, and engineering productivity.
- Define reusable methodologies and automation frameworks that accelerate project execution.
- Evaluate and deploy next-generation EDA capabilities across both Synopsys and Cadence tool ecosystems.
- Collaborate with EDA vendors to drive methodology improvements, debug tool issues, and influence future capabilities.
- Explore and integrate AI technologies that improve implementation, design-space exploration, closure, debug, and engineering efficiency.
- Help define the long-term roadmap for Back-End CAD and physical implementation within PEU Silicon.
- Mentor engineers and help build a culture of technical excellence and execution.
Requirements
- 10+ years of experience in Physical Design, Back-End CAD, or Physical Implementation Methodology.
- Deep expertise in synthesis, floorplanning, placement, clock-tree synthesis, routing, timing closure, and power optimization.
- Strong hands-on experience with Synopsys Fusion Compiler and/or Cadence Innovus.
- Proven experience developing and deploying methodologies on advanced technology nodes.
- Strong understanding of complete RTL-to-GDS implementation flows.
- Expertise in Python, Tcl, and automation framework development.
- Experience driving methodology improvements across multiple projects and engineering teams.
- Strong communication and leadership skills with the ability to influence engineers, project teams, and EDA vendors.
- Curiosity about how AI will transform silicon development and enthusiasm for building the next generation of engineering workflows.
Skills
- Physical Design
- Back-End CAD
- Physical Implementation Methodology
- Synthesis
- Floorplanning
- Placement
- Clock-tree synthesis
- Routing
- Timing closure
- Power optimization
- Synopsys Fusion Compiler
- Cadence Innovus
- Python
- Tcl
- Automation framework development
- AI technologies
Location
- Austin, Texas
Work Type
- On-site
- Hybrid
Experience Level
- 10+ years
Education Level
- BS/MS, Electrical Engineering, Computer Science or similar
Salary/Compensations
- The salary range for this position is dependent on various factors including, but not limited to, location, and the candidate’s combination of job-related knowledge, qualifications, skills, education, training, and experience.
- Your pay also includes the opportunity for an annual bonus.
Benefits
- Choice of three medical plan options
- Dental plan option
- Company credits towards medical and dental premiums
- Ericsson US 401(k) Plan with automatic 3% company contribution and matching
- Company-paid basic life insurance
- Company-paid basic accidental death and dismemberment coverage
- Company-paid short-term disability coverage
- Company-paid long-term disability coverage
- Optional participation in Ericsson’s Stock Purchase Plan
- 15 days of accrued vacation
- Up to 3 personal days per year
- 11 annual holidays
- 8 hours of volunteer time
- 80 hours of sick time annually
- Up to 16 weeks of paid maternity leave
- 6 weeks of parental or adoption leave at 100% of pay
- Financial wellness programs
- Educational assistance
- Matching gifts
- Recognition programs
About the Company
- Ericsson uses a merit-based hiring approach that values people with different experiences, perspectives and skillsets.
- We truly believe this approach drives innovation, which is essential for our future growth.
- We encourage people from all backgrounds to apply and realize their full potential as part of our Ericsson team.
Equal Opportunity
- Ericsson is proud to be an Equal Opportunity employer, learn more.
- If you need assistance or to request an accommodation due to a disability, please contact Ericsson at hr.direct.americas@ericsson.com.