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About the Role

As a key member within the Frontend CAD department, you will play a crucial role in shaping and optimizing methodologies and EDA workflows, ensuring seamless adoption of industry best practices for crafting efficient System on Chips (SoCs).

Responsibilities

• Internal support to project teams for infrastructure, flow development and EDA tools
• Collaborate with cross-functional teams to define verification requirements and ensure alignment with overall project goals.

Requirements

• Several years of in-industry, hands on experience in ASIC IP/ASIC SoC design, RTL, Verilog, and System Verilog
• Proficiency in front-end tools including Verilog simulators, debug tools and coverage
• Familiarity with synthesis, static timing analysis, and logic equivalence checking
• Knowledge of scripting languages such as Perl and Python
• Basic understanding of verification methodologies, like UVM, Constrained Random Verification, and formal verification

Skills

• ASIC IP/ASIC SoC design
• RTL
• Verilog
• System Verilog
• Verilog simulators
• debug tools
• coverage
• synthesis
• static timing analysis
• logic equivalence checking
• Perl
• Python
• UVM
• Constrained Random Verification
• formal verification

Location

• Austin, Texas

Work Type

• On-Site
• Hybrid

Experience Level

• Several years of in-industry experience

Education Level

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field

Salary/Compensations

• The salary range for this position is dependent on various factors including, but not limited to, location, and the candidate’s combination of job-related knowledge, qualifications, skills, education, training, and experience.

Benefits

• Choice of three medical plan options
• Dental plan option
• Company credits towards medical and dental premiums
• 401(k) Plan with company contribution and match
• Company credits for basic life insurance and basic accidental death and dismemberment coverage
• Short-term and long-term disability coverage
• Optional participation in Stock Purchase Plan
• Minimum of 15 days of accrued vacation
• Up to 3 personal days per year
• 11 annual holidays
• 8 hours of volunteer time
• 80 hours of sick time annually
• Up to 16 weeks of paid maternity leave
• 6 weeks of parental or adoption leave at 100% of pay
• Financial wellness programs
• Educational assistance
• Matching gifts
• Recognition programs

About the Company

• Ericsson uses a merit-based hiring approach that values people with different experiences, perspectives and skillsets.
• We truly believe this approach drives innovation, which is essential for our future growth.
• We encourage people from all backgrounds to apply and realize their full potential as part of our Ericsson team.

Equal Opportunity

• Ericsson is proud to be an Equal Opportunity employer
• If you need assistance or to request an accommodation due to a disability, please contact Ericsson at hr.direct.americas@ericsson.com.